Z8F042AHJ020SG Datasheet, PDF (122/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F082A Series
Product Specification
105
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine (ISR) performs the
following:
1. Checks the UART Status 0 Register to determine the source of the interrupt - error,
break, or received data.
2. Reads the data from the UART Receive Data Register if the interrupt was because of
data available. If operating in MULTIPROCESSOR (9-bit) Mode, further actions may
be required depending on the MULTIPROCESSOR Mode bits MPMD[1:0].
3. Clears the UART Receiver interrupt in the applicable Interrupt Request Register.
4. Executes the IRET instruction to return from the interrupt-service routine and await
more data.
Clear To Send (CTS) Operation
The CTS pin, if enabled by the CTSE bit of the UART Control 0 Register, performs flow
control on the outgoing transmit datastream. The Clear To Send (CTS) input pin is sam-
pled one system clock before beginning any new character transmission. To delay trans-
mission of the next data character, an external receiver must deassert CTS at least one
system clock cycle before a new data transmission begins. For multiple character trans-
missions, this action is typically performed during Stop Bit transmission. If CTS deasserts
in the middle of a character transmission, the current character is sent completely.
MULTIPROCESSOR (9-bit) Mode
The UART features a MULTIPROCESSOR (9-bit) Mode that uses an extra (9th) bit for
selective communication when a number of processors share a common UART bus. In
MULTIPROCESSOR Mode (also referred to as 9-bit Mode), the multiprocessor bit (MP) is
transmitted immediately following the 8-bits of data and immediately preceding the Stop
bit(s) as displayed in Figure 13. The character format is:
Idle State
of Line
lsb
1
Data Field
msb
Start Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 MP
0
Stop Bit(s)
1
2
Figure 13. UART Asynchronous MULTIPROCESSOR Mode Data Format
PS022827-1212
PRELIMINARY
Operation