Z8F042AHJ020SG Datasheet, PDF(106/282 Page) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8F042AHJ020SG Datasheet, PDF (106/282 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

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Z8 Encore! XPÂ® F082A Series

Product Specification

89

Bit

[5:3]ï

PRES

[2:0]ï

TMODE

Description (Continued)

Prescale value

The timer input clock is divided by 2PRES, where PRES can be set from 0 to 7. The prescaler is

reset each time the Timer is disabled. This reset ensures proper clock division each time the

Timer is restarted.

000 = Divide by 1.ï

001 = Divide by 2.ï

010 = Divide by 4.ï

011 = Divide by 8.ï

100 = Divide by 16.ï

101 = Divide by 32.ï

110 = Divide by 64.ï

111 = Divide by 128.

Timer Mode

This field, along with the TMODEHI bit in the TxCTL0 Register, determines the operating mode

of the timer. TMODEHI is the most significant bit of the Timer mode selection value. The entire

operating mode bits are expressed as {TMODEHI, TMODE[2:0]}. The TMODEHI is bit 7 of the

TxCTL0 Register while TMODE[2:0] is the lower 3 bits of the TxCTL1 Register.

0000 = ONE-SHOT Mode.ï

0001 = CONTINUOUS Mode.ï

0010 = COUNTER Mode.ï

0011 = PWM SINGLE OUTPUT Mode.ï

0100 = CAPTURE Mode.ï

0101 = COMPARE Mode.ï

0110 = GATED Mode.ï

0111 = CAPTURE/COMPARE Mode.ï

1000 = PWM DUAL OUTPUT Mode.ï

1001 = CAPTURE RESTART Mode.ï

1010 = COMPARATOR COUNTER Mode.

Timer 0â1 High and Low Byte Registers

The Timer 0â1 High and Low Byte (TxH and TxL) registers, shown in Tables 52 and 53,

contain the current 16-bit timer count value. When the timer is enabled, a read from TxH

causes the value in TxL to be stored in a temporary holding register. A read from TxL

always returns this temporary register when the timers are enabled. When the timer is dis-

abled, reads from TxL read the register directly.

Writing to the Timer High and Low Byte registers while the timer is enabled is not recom-

mended. There are no temporary holding registers available for write operations, so simul-

taneous 16-bit writes are not possible. If either the Timer High or Low Byte registers are

written during counting, the 8-bit written value is placed in the counter (High or Low

Byte) at the next clock edge. The counter continues counting from the new value.

PS022827-1212

PRELIMINARY

Timer Control Register Definitions

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