Z86D990 Datasheet, PDF (68/102 Pages) Zilog, Inc. – Low-Voltage Micro controllers with ADC

Z86D990/Z86D991 OTP and Z86L99X ROM
Low-Voltage Microcontrollers with ADC
61
Analog-to-Digital Converter Control Registers
The Z86D99/Z86L99 family features an 8-bit analog-to-digital converter with
external voltage references. The output of the ADC is stored in the ADC Data
Register, as shown in Table 20. The ADC is configured using the ADC Control
Register, as shown in Table 19.
Table 19. ADCCTRL Register (Group/Bank 0Fh, Register 8)
Bit
7
6
5
4
Bit/Field
P47_ P46_ P45_
A/D A/D A/D
R/W
R/W R/W R/W
Reset
0
0
0
R = Read, W = Write, X = Indeterminate
Bit
Position Bit/Field
R/W
7_______ P47_A/D
R/W
_6______ P46_A/D
R/W
__5_____ P45_A/D
R/W
___4____ P44_A/D
R/W
____32__ Channel
R/W
Selection
______1_ A/D_PowerON R/W
_______0 ADC Clock Select R/W
P44_
A/D
R/W
0
Value
1
0
1
0
1
0
1
0
11
10
01
00
1
0
1
0
3
2
Channel
Selection
R/W R/W
0
0
1
0
ADC
A/D Pwr Clock
On
Select
R/W R/W
0
0
Description
P47 configured as A/D Input
P47 configured as digital input
P46 configured as A/D Input
P46 configured as digital input
P45 configured as A/D Input
P45 configured as digital input
P44 configured as A/D Input
P44 configured as digital input
Channel 3 (P47)
Channel 2 (P46)
Channel 1 (P45)
Channel 0 (P44)
ON
OFF
SCLK/2
SCLK
ADC Control Register (ADCCTRL)
The ADCCTRL register controls the operation of the analog-to-digital converter.
Bits 2 and 3 of the ADCCTRL register determine which of the four analog input
channels feeds into the ADC at any given time. Bits 4 through 7 enable or disable
the digital input buffer. When configured as an ADC input channel, the port has to
be configured in Input Mode and with the digital input buffer disabled.
PS003807-1002
PRELIMINARY