Z86D990 Datasheet, PDF (31/102 Pages) Zilog, Inc. – Low-Voltage Micro controllers with ADC

Z86D990/Z86D991 OTP and Z86L99X ROM
Low-Voltage Microcontrollers with ADC
24
pins (Ports 2 and 5) to be used as stop-mode recovery sources. The STOP mode
is exited when one of these SMR sources is toggled. A transition from either low to
high or high to low on any pin of Port 2 or Port 5 if the pin is identified as an SMR
source will effect an SMR.
There are three registers that control STOP mode recovery:
• Stop Mode Recovery
• Port 2 Stop Mode Recovery (P2SMR)
• Port 5 Stop Mode Recovery (P5SMR)
The functions and applications of these registers are explained in “Stop-Mode
Recovery Control Registers” on page 82.
Low-Voltage Standby
An on-chip voltage comparator checks that the V_CC level is at the required level
for correct operation of the Z8. When V_CC falls below the low-voltage trip voltage
(V_LV), reset is globally driven, and then the device is put in a low-current standby
mode with the external oscillator stopped. If the V_CC remains above V_RAM, the
RAM content is preserved.
When the power level rises above the V_LV level, the device performs a POR and
functions normally.
The minimum operating voltage varies with temperature and operating frequency,
while V_LV varies with temperature only.
I/O Ports
The Z86D99/Z86L99 family has up to 32 lines dedicated to input and output in the
40-pin configuration. These lines are grouped into four 8-bit ports known as Port
2, Port 4, Port 5, and Port 6. All four ports are bit programmable as either inputs or
outputs with the exception of P52, P53, and P43. P52 and P53 are input only as
they are used in OTP programming. P43 is the controlled current output and is
therefore output only.
All ports have push-pull CMOS outputs. In addition, the push-pull outputs can be
turned off for open-drain operation using the P456CON register.
Internal resistive pull-up transistors are available as a user-defined OTP/mask
option on all ports. For Ports 4, 5, and 6, the pull-ups are nibble selectable. For
Port 2, the pull-up option applies to all eight I/O lines.
Note: Internal pull-ups are disabled on any given pin or group of port
pins when those pins are programmed as outputs.
PS003807-1002
PRELIMINARY