Z86D990 Datasheet, PDF (18/102 Pages) Zilog, Inc. – Low-Voltage Micro controllers with ADC

Z86D990/Z86D991 OTP and Z86L99X ROM
Low-Voltage Microcontrollers with ADC
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general-purpose RAM registers, and control and status registers. Every RAM reg-
ister acts like an accumulator, speeding instruction execution and maximizing cod-
ing efficiency. Working register groups allow fast context switching.
The standard register file of the Z8 (known as Bank 0) has been expanded to form
16 expanded register file (ERF) banks. The expanded register file allows for addi-
tional system control registers and for the mapping of additional peripheral
devices into the register area. Each ERF bank can potentially consist of up to 256
registers (the same amount as in the standard register file) that can then be
divided into 16 working register groups. Currently, only Group 0 of ERF Banks F
and D (0Fh and 0Dh) has been implemented.
In addition to the standard program memory and the RAM register files, the
Z86D99/Z86L99 family also has 256 bytes of executable RAM that has been
mapped into the upper 256 bytes of the program memory address space (FF00h–
FFFFh). Data can be written to the executable RAM by using the LDC instruction.
Program Memory Structure
The first 12 bytes of program memory are reserved for the interrupt vectors.
These locations contain six 16-bit vectors that correspond to the six available
interrupts (IRQ₀ through IRQ₅.) Address 12 (0Ch) up to 32,767 (7FFFh) consists of
on-chip one-time programmable memory. The Z86L99X only has the 4K/8K/16K
ROM size.
After any reset operation (power-on reset, watch-dog timer time out, and stop
mode recovery), program execution resumes with the initial instruction fetch from
location 000Ch. After a reset, the first routine executed must be one that initializes
the control registers to the required system configuration.
A unique feature of the Z86D99/Z86L99 family is the presence of 256 bytes of on-
chip executable RAM. This random-access memory is in addition to the standard
Z8 register file memory available on all Z8 microcontrollers. As illustrated in
Figure 5, the executable RAM is mapped into the upper 256 bytes of the 64K pro-
gram memory address space (FF00h–FFFFh). Data can be written to the execut-
able RAM by using the LDC instruction.
Memory locations between 8000h and FEFFh have not been implemented on the
Z86D99X microcontrollers.
The Z86D99/Z86L99 family does not have the capability of accessing external
memory.
PS003807-1002
PRELIMINARY