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Z86D990 Datasheet, PDF (19/102 Pages) Zilog, Inc. – Low-Voltage Micro controllers with ADC
Z86D990/Z86D991 OTP and Z86L99X ROM
Low-Voltage Microcontrollers with ADC
12
Location (Hex)
FFFF
FF00
3FFF/7FFF
(ROM)/(OTP)
256 bytes
Executable RAM
Not Implemented
PROGRAM
MEMORY
000C
000B
000A
0009
0008
0007
0006
0005
0004
0003
0002
0001
0000
Figure 5.
Location of the first byte of the initial instruction executed after
RESET
IRQ5 (lower byte)
IRQ5 (upper byte)
IRQ4 (lower byte)
IRQ4 (upper byte)
IRQ3 (lower byte)
IRQ3 (upper byte)
IRQ2 (lower byte)
IRQ2 (upper byte)
IRQ1 (lower byte)
IRQ1 (upper byte)
IRQ0 (lower byte)
IRQ0 (upper byte)
Program Memory Map
Z8 Standard Register File (Bank 0)
Bank 0 of the Z8 expanded register file architecture is known as the standard reg-
ister file of the Z8. As shown in Figure 6, the Z8 standard register file consists of
16 groups of sixteen 8-bit registers known as Working Register (WR) groups.
Working Register Group F contains various control and status registers. The lower
half of Working Register Group 0 consists of I/O port registers (R0 to R7), the
upper eight registers are available for use as general-purpose RAM registers.
Working Register Group 1 through Group E of the standard register file are avail-
able to be used as general-purpose RAM registers. The user can use 233 bytes of
general-purpose RAM registers in the standard Z8 register file (Bank 0).
PS003807-1002
PRELIMINARY