Z86L9900100ZEM Datasheet, PDF (67/70 Pages) Zilog, Inc. – ICEBOX

A
B
C
4
pg3 A_M[15..8]
A_M[15..8]
pg3 nRST_frM
pg3 C_DR_ADI
MB INTER FACE CONNECTOR 1
VCC
pg3
R_W_M
P1
pg3 nRST_CT
pg3
nAS_M
pg3
nDS_M
pg3,7,9,10 AD_M[7..0]
AD_M[7..0]
1
nAS_M (nM_AS)
3
nDS_M (nM_DS)
5
R_W_M (M_R/W)
7
n R S T _ C T(nRESET2)
9
2
4
(TRACE)
6
(CH_DIR) C _ D R _ A D I
8
(TRIGGER)
10
(M_P25) nRST_frM
AD_M0 (M_D0)
11
12
(M_A8) A_M8
AD_M1 (M_D1)
13
14
(M_A9) A_M9
AD_M2 (M_D2)
15
16
(M_A10) A_M10
AD_M3 (M_D3)
17
18
(M_A11) A_M11
3
AD_M4 (M_D4)
19
AD_M5 (M_D5)
21
20
(M_A12) A_M12
22
(M_A13) A_M13
pg10 D_P[7..0]
D_P[7..0]
AD_M6 (M_D6)
23
AD_M7 (M_D7)
25
24
(M_A14) A_M14
26
(M_A15) A_M15
D_P0 (D0)
27
28
D_P1 (D1)
29
30
(SIZE0)
D_P2 (D2)
31
32
(SIZE1)
D_P3 (D3)
33
34
(SIZE2)
D_P4 (D4)
35
36
(SIZE3)
D_P5 (D5)
37
38
(SIZE4)
D_P6 (D6)
39
40
(M_P31)
D_P7 (D7)
41
42
(P_TBD0) (nCS) 43
44
(nCS_RD) P_CLK_CE
(P_TBD1) (VPP) ₄₅
46
(nD_E) P_WR_RD
(P_TBD2) (EPM) 47
48
(6D0X=>6D0X) P_AH_CLK
(P_TBD3)(VCC_CT)
49
50
(6D2X=>6D1X) P_AL_CLK
pg3
nDS_frI
nDS_frI (nU_M_DS) 51
53
52
(6D4X=>6D2X) P_CT_CLK
54
(6D6X=>6D3X) LED_CLK
(14V) ₅₅
56
(6D8X=>6D4X) P_BUF_WR_CLK
57
58
(6DAX=>6D5X)
59
(57EX=>6D6X)
61
60
62
(57FX=>6D7X) nWR_DAC
63
64
2
pg9 nWR_DAC
pg3,7 P_CT_CLK
pg10 P_AL_CLK
pg10 P_AH_CLK
pg3 P_WR_RD
pg3 P_CLK_CE
1
FOR USER"S MANUAL ONLY
A
B
C
UM005100-IRR0400
D
E
4
MB INTER FACE CONNECTOR 2
VCC
AD_I[7..0]
AD_I[7..0] pg7,11
FG_BG pg3,7,11
nMAS_I pg11
C_JAM_P1 pg3
nIRQ_ACK pg11
P2
1
nIRQ_ACK (nIACK)
3
C_JAM_P1 (nCS_U245) 5
nMAS_I (nU_AS)
7
FG_BG(ICRAM)
9
AD_I0 (UD0) 11
AD_I1 (UD1) 13
AD_I2 (UD2) 15
AD_I3 (UD3) 17
AD_I4 (UD4) 19
AD_I5 (UD5) 21
AD_I6 (UD6) 23
AD_I7 (UD7) 25
P50 (U_P50)
27
P51 (U_P51)
29
P52 (U_P52)
31
P53 (U_P53)
33
P54 (U_P54)
35
P55 (U_P55)
37
P56 (U_P56)
39
P57 (U_P57)
41
A_I8 (UA8) 43
A_I9 (UA9) 45
A_I10 (UA10) 47
A_I11 (UA11) 49
A_I12 (UA12) 51
A_I13 (UA13) 53
A_I14 (UA14) 55
A_I15 (UA15) 57
(nBRPDRAM)
59
n D M(nBRP_OFF)
61
63
2
4
(U_PXX) R_W_I
6
(U_P35)
8
nSYNC
10 SCLK
12 ^(U_P10)
14 (U_P11)
16 ^(U_P12)
18 (U_P13)
20 (U_P14)
22 ^(U_P15)
24 (U_P16)
26 ^(U_P17)
28
(U_P40) P40
30
(U_P41) P41
32
(U_P42) P42
34
(U_P43) P43
36
(U_P44) P44
38
(U_P45) P45
40
(U_P46) P46
42
(U_P47) P47
44
(U_P20) P20
46
(U_P21) P21
48
(U_P22) P22
50
(U_P23) P23
52
(U_P24) P24
54
(U_P25) P25
56
(U_P26) P26
58
(U_P27) P27
60
(nBRPPRAM)
62
(nBRP_ROM)
64
R_W_I
nSYNC
SCLK
pg11
pg11
pg11
3
P4[0..7] pg7
P2[0..7] pg7
2
nDM
A_I[15..8]
nDM
pg3
A_I[15..8] pg11
P5[0..7] pg7
1
MOTHERBOARD INTERFACE
Title
SCHEMATIC, Z86L99EMULATION DAUGHTER BOARD
Size
B
Document Number
Rev
A
Date:
Monday, August 14, 2000
Sheet
8
of 11
D
E
Schematic 8