Z86017 Datasheet, PDF (59/138 Pages) Zilog, Inc. – PCMCIA Interface Solution

Z86017/Z16017 PCMCIA Interface Solution
Product Specification
45
EEPROM Register
Address: SELECT 03h
Name: Interface Configuration Register 2
Type: Read/Write
Table 19. Interface Configuration Register 2: Address 03h
Bit Placement Bit Name
Bit 0
EN_MEM_MODE
Bit 1
EN_INDP_MODE
Bit 2
EN_ATT_MODE
Bit 3
EN_INVERT_HCS0
Bit 4
EN_INVERT_HCS1
Bit 5
EN_INVERT_ATRST
Bit 6
EN_IO_MODE
Bit 7
Reserved
Description
Enables PCMCIA memory access mode. This bit controls
window0. It is active when set to 1. On Power-On Reset,
this bit is set to 0.
Enables PCMCIA independent I/O access mode. This bit
controls window0. It is active when set to 1. On Power-On
Reset, this bit is set to 0.
Enables PCMCIA attribute memory access. This bit is
active when set to 1. On Power-On Reset, this bit is set to
0. Also see Registers 08h and 09h (Table 28 and Table 29).
Inverts the polarity of HCS0 output. HCS0 is active High
when this bit is set. HCS0 is active Low when this bit is
cleared. This bit is active when set to 1. On Power-On
Reset, this bit is set to 0, active Low. Also see Register 02h
(Table 14).
Inverts the polarity of HCS1 output. HCS1 is active High
when this bit is set. HCS1 is active Low when this bit is
cleared. This bit is active when set to 1. On Power-On
Reset, this bit is set to 0, active Low. Also see Register 02h
(Table 14).
Inverts the polarity of the ATA_HRESET output.
Enables PCMCIA/ATA/IDE access to 1Fx, 3Fx, 17x, 1Fx
task Registers. This bit controls window0. This bit is active
when set to 1. On Power-On-Reset, this bit is set to 0.
Programming Internal Registers
PS012002-1201