Z86017 Datasheet, PDF (22/138 Pages) Zilog, Inc. – PCMCIA Interface Solution

Z86017/Z16017 PCMCIA Interface Solution
Product Specification
8
ZX6017 device. After the host writes new values to the EEPROM
through these registers, the new values are loaded into the ZX6017 at
Power-On Reset (POR).
Note: The values written register 05h offset the CCR registers and the
three special EEPROM programming registers on the next POR.
PCMCIA Bus
PC_DATA 15:0
PC_HA 10:0
PCMCIA
Host
PC_RDY/BSY/IREQ/HINT
PC_WAIT/IOCHRDY
PC_HCE1/HCS0
PC_HCE2/HCS1
PC_ATA/HOE
PC_HIOR
PC_HIOW
PC_HWE
PC_REG/DACK
PC_HRESET/HRESET
PC_BVD1//STSCHG/PDIAG
PC_WP/IOIS16/IOCS16
PC_BVD2//SPKR/DASP/DREQ
PC_INPACK/DREQ
EEPROM Programming Registers
7F0H
7F2H
7F4H
EEPROM Address/Status
EEPROM Data
EEPROM Command
EEPROM Commands
A8H
AAH
ABH
ACH
ADH
Read
Write
Erase
Disable Write
Enable Write or Erase
Z86017
Attribute
Memory
Window 1
Start/Range
Decoder
Window 2
Start/Range
Decoder
Window 3
Start/Range
Decoder
ATA/IDE
Window
Decoder
EEPROM
Programming
Registers
Local Peripheral Bus
ATA_DATA 15:0
ATA_HCS0
ATA_HCS1
Chip Selects
ATA_HA0
ATA_HA1
ATA_HA2
Address Selects
ATA_HIOR
ATAA_HIOW
I/O R/W
Strobes
ATA_MRD
ATA_MWR
Memory R/W
Strobes
ATA_IOCHRDY
ATA_IREQ
ATA_IOCS16
ATA_RESET
ATA_DREQ/BVD1
ATA_PDASP/EXTP_WP
ATA_PDIAG/ATA_BHE/RING_IN
ATA_DACK/BVD2
General
Peripheral
Bus Interface
EXTP_PWDN
EXTP_AUDIO
EXTP_STSCHG/RES2
CLK
PC_MCLK_IN
/POR
EE_CS
EE_SK
EE_DI
EE_MASTER
EE_DO
M_PINT
POR
0.1 µF
CS CK DO DI
EEPROM
GNDORG NC VCC
Figure 4. EEPROM Programming Through the PCMCIA
Interface
PS012002-1201
PCMCIA Interface Overview