Z86017 Datasheet, PDF (37/138 Pages) Zilog, Inc. – PCMCIA Interface Solution

Z86017/Z16017 PCMCIA Interface Solution
Product Specification
23
acknowledge is generated by the ZX6017 whenever DMA
Acknowledge is enabled in the Window Start/Range Address
registers and the address corresponds to the DMA address; or Battery
Voltage 2 Detect input in memory mode.
• ATA_PDASP/EXTP_WP (I/O, Tri-State, 8 mA)
ATA/IDE Mode: ATA/IDE bus side PDASP signal controlled by
internal bits ZEN_EXT_PDASP (Input) or ZEN_INT_PDASP
(Output).
Peripheral Mode: When configured as a Write Protect input, this pin
will disable Write on the peripheral bus side.
• ATA_PDIAG/ATA_BHE/RING_IN (I/O, Tri-State, 8 mA)
ATA/IDE Mode: ATA/IDE bus side PDIAG signal controlled by
internal bits ZEN_EXT_PDIAG (Input) or ZEN_INT_PDIAG
(Output).
Peripheral Mode: When configured as Byte High Enable for memory
boards, ATA_BHE indicates High byte available, or it can be
configured to be the RING_IN input signal for the I/O event indicator
CCR4.
• ATA_MRD (Output, 8 mA)
ATA/IDE Mode: Not used.
Peripheral Mode: External Memory Read Strobe.
• ATA_MWR (Output, 8 mA)
ATA/IDE Mode: Not used.
Peripheral Mode: External Memory Write Strobe.
PCMCIA Interface Overview
PS012002-1201