Z85C3010VSG Datasheet, PDF (47/83 Pages) Zilog, Inc. – CMOS SCC Serial Communications Controller

CMOS SCC Serial Communications Controller
Product Specification
39
Read Register 0
D7 D6 D5 D4 D3 D2 D1 D0
Read Register 3
D7 D6 D5 D4 D3 D2 D1 D0
Read Register 1
D7 D6 D5 D4 D3 D2 D1 D0
Rx Character Available
Zero Count
Tx Buffer Empty
DCD
Sync/Hunt
CTS
Tx Underrun/EOM
Break/Abort
All Sent
Residue Code 2
Residue Code 1
Residue Code 0
Parity Error
Rx Overrun Error
CRC/Framing Error
End of Frame (SDLC)
Read Register 2
D7 D6 D5 D4 D3 D2 D1 D0
* Modified in B Channel
V0
V1
V2
V3
Interrupt
V4
Vector *
V5
V6
V7
* Always 0 in B Channel
Read Register 10
D7 D6 D5 D4 D3 D2 D1 D0
Channel B Ext/Status IP
Channel B Tx IP
Channel B Rx IP
Channel A Ext/Status IP ^*
Channel A Tx IP
Channel A Rx IP
0
0
Read Register 12
D7 D6 D5 D4 D3 D2 D1 D0
0
On Loop
0
0
Loop Sending
0
Two Clocks Missing
One Clocks Missing
TC0
TC1
TC2
TC3
Lower Byte
TC4
of Time Constant
TC5
TC6
TC7
Figure 19. Read Register Bit Functions
PS011707-1013
Functional Descriptions