Z86C83 Datasheet, PDF (29/46 Pages) Zilog, Inc. – Z8 MCU MICROCONTROLLERS

Z86C83/C84
Z8^® MCU Microcontrollers
FUNCTIONAL DESCRIPTION (Continued)
ADC0 (A) Bank C, Register 8
D7 D6 D5 D4 D3 D2 D1 D0
* Default After Reset
CSEL0
CSEL1
CSEL2
SCAN
0 = No action. *
1 = Convert, then stop.
A_IN/Input/Output Control
0 = No action *
1 = Enable selected channel
(D₂,D₁,D₀) as analog input
on associated Port 20-27
Must be D7 = 0
D6 = 0
D5 = 1
Figure 23. ADC Control Register 0 (Read/Write)
ADE (bit 7). A zero disables any A/D conversions or
accessing any ADC registers except writing to ADE bit. A
one Enables all ADC accesses. ADC result register is
shown in Figure 25.
ADR Bank C, Register A
D7 D6 D5 D4 D3 D2 D1 D0
Data
Figure 25. Result Register (Read-Only)
SCAN
0
1
No action*
Convert channel then stop
Channel Select (bits 2, 1, 0).
CSEL2
CSEL1
CSEL0
Channel
0
0
0
0 (P20)*
0
0
1
1 (P21)
0
1
0
2 (P22)
0
1
1
3 (P23)
1
0
0
4 (P24)
1
0
1
5 (P25)
1
1
0
6 (P26)
1
1
1
7 (P27)
Note: *The desired P2 bit must be set equal 1 to allow Port bit
ias ADC input.
ADC1 Bank C, Register 9
D7 D6 D5 D4 D3 D2 D1 D0
Must be 0.
D5 D4
0 0 50 % AGND Offset
1 0 35% AGND Offset
0 1 Reserved
1 1 No Offset
Reserved (Must be 1.)
ADE
0 Disable*
1 Enable
Figure 24. ADC Control Register 1 (Read/Write)
29
Reg F
Reg E
Reg D
Reg C
Reg B
Reg A
Reg 9
Reg 8
Reg 7
Reg 6
Reg 5
Reg 4
Reg 3
Reg 2
Reg 1
Reg 0
AD Result 1
AD Control 1
AD Control 0
These registers
can be accessed.
Figure 26. Bank C
DS96DZ80203