WP484 Datasheet, PDF (7/12 Pages) Xilinx, Inc – DDR2/DDR3 Low-Cost PCB Design

DDR2/DDR3 Low-Cost PCB Design Guidelines for Artix-7 and Spartan-7 FPGAs
Micro Vias – A micro via is a form of blind via. The dimensions of a micro via are very small. They
are formed using lasers and typically cannot penetrate more than one or two layers at a time. The
cost adder is approximately 15% for each type of via.
Extra Layers – The cost of adding extra signal layers might be lower than the cost for some of the
advanced via technologies described above. Hence, adding layers should not always be considered
a negative alternative. The cost adder for two additional layers is typically 15–20% of the PCB
fabrication cost.
With an advanced fabrication process, the PCB designer can spec traces as narrow as 2.5mils with
2.5mils spacing to achieve the target impedance specifications for optimum SI performance.
Xilinx has a detailed data sheet titled Recommended Design Rules and Strategies for BGA Devices
[Ref 1] that provides specific guidelines on the dimensions of the surface pads, PTH sizes, trace
width, and spacing recommendations for PCB breakout routing for various pin pitches. The user
guide also includes snapshots of actual PCB layouts for a cost-optimized design, along with a
design using an advanced PCB fabrication process for different pin pitches.
Low-Cost DDR3 Guidelines
Based on system requirements, DDR2/3 memories are connected to the Artix-7 and Spartan-7
FPGAs as either a set of discrete SDRAMs or as a DIMM module. Not all devices in these product
families support all possible memory configurations. The exact memory configuration supported is
dependent on the specific die / package combination.
Regardless of the topology, successful operation of the DDR2/3 interface at the highest possible
data rate depends on its own microsystem of components and other factors. These factors include
driver and receiver buffers, terminations, interconnect impedances, delay matching, crosstalk, and
power integrity. A general comparison of the two memory types is shown in Table 3, while the
signals common to both DDR2 and DDR3 are shown in Figure 5.
Table 3: Comparative Requirements of DDR2 and DDR3 Memory
Technology
DDR2
DDR3
Maximum supported clock frequency (MHz)
/Data rate (Mb/s) on Artix-7 and Spartan-7
400/800
533 /1066 on Artix-7
400/800 on Spartan-7
Power Requirements (Volts)
V_VDDQ
V_TT
V_REF
Delay Matching Requirements
1.80
0.9
0.9
1.50
0.75
0.75
Match ADDR/CMD/CTRL to Clock
Yes
Yes
Match Data group (DQ), DM to corresponding
strobe pair (DQS)
Yes
Yes
Match DQS to Clock Loosely
Yes
Not required
WP484 (v1.0) September 27, 2016
www.xilinx.com
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