WP484 Datasheet, PDF (1/12 Pages) Xilinx, Inc – DDR2/DDR3 Low-Cost PCB Design

White Paper: Artix-7 and Spartan-7 FPGAs
WP484 (v1.0) September 27, 2016
DDR2/DDR3 Low-Cost PCB Design
Guidelines for
Artix-7 and Spartan-7 FPGAs
By: Ravindra Gali
The Artix®-7and Spartan®-7 families offer a low cost, small
footprint array of highly efficient FPGAs, purpose-designed
to address the special needs of the low-end market.
ABSTRACT
In an ongoing endeavor to increase throughput, designers have increasingly
been pairing low-power, low-cost FPGAs like the Xilinx® Artix-7 and Spartan-7
class of devices with high-performance DDR2/DDR3 memories. In today's
cost-sensitive systems, for example, one might find a low-cost FPGA moving
data to and from a DDR3 memory at up to 1066Mb/s.
Given the cost-sensitive nature of these applications, system designers are
often challenged to come up with a PCB design with the lowest bill of materials
(BOM) cost. This white paper provides PCB designers with a set of pragmatic
layout guidelines to tackle high-performance DDR2/DDR3 designs based on
low-cost FPGAs. Also addressed are the cost trade-offs for designers opting
for advanced PCB fabrication technologies to reduce the PCB layer count.
© Copyright 2016 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx
in the United States and other countries. All other trademarks are the property of their respective owners.
WP484 (v1.0) September 27, 2016
www.xilinx.com
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