WM8962B Datasheet, PDF (268/295 Pages) Wolfson Microelectronics plc – Ultra-Low Power Stereo CODEC with Audio Enhancement DSP, 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers

WM8962
REGISTER BIT
ADDRESS
LABEL
DEFAULT
DESCRIPTION
R584 (0248h) 5
IRQ
Debounce
FLL_LOCK_DB
1
Debounce Enable on FLL Lock
0 = Disabled
1 = Enabled
4
Reserved
1
Reserved - do not change
3
PLL3_LOCK_D
B
1
Debounce Enable on PLL3 Lock
0 = Disabled
1 = Enabled
2
PLL2_LOCK_D
B
1
Debounce Enable on PLL2 Lock
0 = Disabled
1 = Enabled
1
Reserved
1
Reserved - do not change
0 TEMP_SHUT_D
1
Debounce Enable on Temperature Shutdown
B
0 = Disabled
1 = Enabled
Register 0248h IRQ Debounce
REGISTER
ADDRESS
R586
(024Ah)
MICINT
Source Pol
BIT
LABEL
DEFAULT
DESCRIPTION
15 MICSCD_IRQ_P
0
Mic Short Circuit Interrupt Polarity
OL
0 = Active high (IRQ asserted when MICSHORT_THR is
exceeded)
1 = Active low (IRQ asserted when MICSHORT_THR not
exceeded)
14 MICD_IRQ_POL
0
Mic Detect Interrupt Polarity
0 = Active high (IRQ asserted when MICDET_THR is
exceeded)
1 = Active low (IRQ asserted when MICDET_THR not
exceeded)
Register 024Ah MICINT Source Pol
REGISTER BIT
ADDRESS
R768 (0300h) 0
DSP2 Power
Management
LABEL
DEFAULT
DESCRIPTION
DSP2_ENA
0
DSP2 Audio Processor Enable.
0 = Disabled
1 = Enabled
This bit must be set before any of ADC ReTune, DAC
ReTune, DAC HPF, VSS or HDBass is enabled. It must
remain set whenever any of these functions is enabled.
Register 0300h DSP2 Power Management
268
Rev 4.3