WM8962B Datasheet, PDF (196/295 Pages) Wolfson Microelectronics plc – Ultra-Low Power Stereo CODEC with Audio Enhancement DSP, 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers

WM8962
WSEQ
INDEX
21 (15h)
REGISTER
ADDRESS
R60 (3Ch)
WIDTH
6 bits
START DATA DELAY
Bit 2
33h
Ah
22 (16h) R254 (FEh)
23 (17h) R25 (19h)
1 bit
2 bits
Bit 0
00h
0h
Bit 2
03h
0h
24 (18h)
25 (19h)
R32 (20h)
R33 (21h)
3 bits
3 bits
Bit 3
00h
0h
Bit 3
00h
0h
Table 127 Analogue Input Power Up Sequence
EOS
0b
0b
0b
0b
1b
DESCRIPTION
INL_DCS_ENA = 1
INL_DCS_STARTUP = 1
INR_DCS_ENA = 1
INR_DCS_STARTUP = 1
(time delay inserted)
Dummy Write for expansion
ADCL_ENA = 1
ADCR_ENA = 1
INPGAL_MIXINL_VOL [2:0] = 000
INPGAR_MIXINR_VOL [2:0] = 000
WSEQ
INDEX
27 (1Bh)
REGISTER
ADDRESS
R5 (5h)
28 (1Ch)
29 (1Dh)
R0 (0h)
R1 (1h)
30 (1Eh) R69 (45h)
31 (1Fh)
32 (20h)
33 (21h)
34 (22h)
35 (23h)
36 (24h)
37 (25h)
38 (26h)
R96 (60h)
R2 (2h)
R3 (3h)
R3 (3h)
R40 (28h)
R41 (29h)
R41 (29)
R60 (3Ch)
39 (27h) R61 (3Dh)
40 (28h) R62 (3Eh)
41 (29h) R69 (45h)
42 (2Ah)
43 (2Bh)
R96 (60h)
R49 (31h)
44 (2Ch) R99 (63h)
Chip Power Down
The Chip Power Down sequence is initiated by writing 009Bh to Register 90 (5Ah). This single
operation starts the Control Write Sequencer at Index Address 27 (1Bh).
This sequence takes up to 32ms to run.
WIDTH START DATA DELAY EOS
DESCRIPTION
1 bit
1 bit
2 bits
5 bits
5 bits
7 bits
7 bits
1 bit
7 bits
7 bits
1 bit
5 bits
5 bits
5 bits
8 bits
8 bits
2 bits
4 bits
Bit 3
01h
8h
Bit 7
01h
0h
Bit 7
03h
0h
Bit 3
0Eh
0h
Bit 3
0Eh
0h
Bit 0
00h
0h
Bit 0
00h
0h
Bit 8
01h
0h
Bit 0
00h
0h
Bit 0
00h
0h
Bit 8
01h
0h
Bit 3
00h
0h
Bit 3
00h
0h
Bit 3
00h
0h
Bit 0
00h
0h
Bit 0
00h
0h
Bit 6
00h
0h
Bit 0
00h
0h
0b DAC_MUTE = 1b
(time delay inserted)
0b INPGAL_MUTE = 1b
0b INVU = 1b
INPGAR_MUTE = 1b
0b HP1L_RMV_SHORT = 0b
HP1R_RMV_SHORT = 0b
0b
0b HPOUTL_VOL [6:0] = 00h
0b HPOUTR_VOL [6:0] = 00h
0b HPOUTVU = 1b
0b SPKOUTL_VOL [6:0] = 00h
0b SPKOUTR_VOL [6:0] = 00h
0b SPKOUT_VU = 1b
0b INL_DCS_ENA = 0b
INR_DCS_ENA = 0b
0b HP1L_DCS_ENA = 0b
HP1R_DCS_ENA = 0b
0b
0b HP1L_ENA_OUTP = 0b
HP1L_ENA_DLY = 0b
HP1L_ENA = 0b
HP1R_ENA_OUTP = 0b
HP1R_ENA_DLY = 0b
HP1R_ENA = 0b
0b
0b SPKOUTR_ENA = 0b
SPKOUTL_ENA = 0b
0b HPMIXL_ENA = 0b
HPMIXR_ENA = 0b
SPKMIXL_ENA = 0b
SPKMIXR_ENA = 0b
196
Rev 4.3