W19B160BT Datasheet, PDF (9/48 Pages) Winbond – 16Mbit, 2.7~3.6 volt CMOS flash memory

W19B160BT/B DATA SHEET
6. FUNCTIONAL DESCRIPTION
6.1 DEVICE BUS OPERATION
6.1.1 Word/Byte Configuration
The #BYTE pin controls the device data I/O pins operate whether in the byte or word configuration.
When the #BYTE pin is ‘1’, the device is in word configuration; DQ15-DQ0 are active and controlled
by #CE and #OE.
When the #BYTE pin is ‘0’, the device is in byte configuration, and only data I/O pins DQ7-DQ0 are
active and controlled by #CE and #OE. The data I/O pins DQ8-DQ14 are tri-stated, and the DQ15 pin
is used as an input for the LSB (A-1) address function.
6.1.2 Reading Array Data
To read array data from the outputs, the #CE and #OE pins must be set to V_IL. #CE is the power
control and used to select the device. #OE is the output control gates array data to the output pins.
#WE should stay at V_IH. The #BYTE pin determines the device outputs array data whether in words or
bytes.
The internal state machine is set for reading array data when device power-up, or after hardware
reset. This ensures that no excess modification of the memory content occurs during the power
transition. In this mode there is no command necessary to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device address inputs produce valid data on the device
data outputs. The device remains enabled for read access until the command register contents are
changed.
6.1.3 Writing Commands/Command Sequences
In writhing a command or command sequence (which includes programming data to the device and
erasing sectors of memory), the system must drive #WE and #CE to V_IL, and #OE to V_IH.
For program operations, the #BYTE pin determines the device accepts program data whether in bytes
or in words. Refer to “Word/Byte Configuration” for more information.
The erase operation can erase a sector, multiple sectors, even the entire device. The “sector address”
is the address bits required to solely select a sector.
6.1.4 Program and Erase Operation Status
During an erase or program operation, the system may check the status of the operation by reading
the status bits on DQ7 – DQ0. Refer to “Write Operation Status” and “AC Characteristics” for more
information.
6.1.5 Standby Mode
When the system is not reading or writing to the device, the device will be in a standby mode. In this
mode, current consumption is greatly reduced, and the outputs are in the high impedance state,
independent from the #OE input.
When the #CE and #RESET pins are both held at V_DD ± 0.3V, the device enters into the CMOS
standby mode (note that this is a more restricted voltage range than V_IH.) When #CE and #RESET are
Publication Release Date:Jan.04, 2008
-9-
Revision A5