W19B160BT Datasheet, PDF (16/48 Pages) Winbond – 16Mbit, 2.7~3.6 volt CMOS flash memory

W19B160BT/B DATA SHEET
command sequence. Since RY/#BY is an open-drain output, several RY/#BY pins can be tied together
in parallel with a pull-up resistor to V_DD.
When the output is low (Busy), the device is actively erasing or programming. When the output is high
(Ready), the device is in the read mode.
6.3.3 DQ6: Toggle Bit
Toggle Bit on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or
complete. Toggle Bit may be read at any address, and is valid after the rising edge of the final #WE
pulse in the command sequence (before the program or erase operation), and during the sector erase
time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address
cause DQ6 to toggle. The system may use either #OE or #CE to control the read cycles. Once the
operation has completed, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6
toggles for about 100µS, and then returns to reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the selected
sectors which are protected.
If a program address falls within a protected sector, DQ6 toggles for about 1 μs after the program
command sequence is written, and then returns to reading array data.
6.3.4 DQ2: Toggle Bit II
When used with DQ6, the “Toggle Bit II” on DQ2 indicates whether a particular sector is actively
erasing (i.e., the Embedded Erase algorithm is in progress), or the sector is erase-suspended. Toggle
Bit II is valid after the rising edge of the final #WE pulse in the command sequence.
DQ2 toggles as the system reads at addresses within those sectors that have been selected for
erasure. (The system may use either #OE or #CE to control the read cycles.) But DQ2 cannot
distinguish that whether the sector is actively erasing or is erase-suspended. By comparison, DQ6
indicates whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish which
sectors are selected for erasure. Therefore, both status bits are required for sector and mode
information.
6.3.5 Reading Toggle Bits DQ6/DQ2
Whenever the system initially starts to read toggle bit status, it must read DQ0−DQ7 at least twice in a
row to determine whether a toggle bit is toggling or not. Typically, the system would note and store the
value of the toggle bit after the first read. While after the second read, the system would compare the
new value of the toggle bit with the first one. If the toggle bit is not toggling, the device has completed
the program or erase operation. The system can read array data on DQ0−DQ7 on the following read
cycle.
However, if after the initial two read cycles, the system finds that the toggle bit is still toggling, the
system also should note whether the value of DQ5 is high or not(see the section on DQ5). If DQ5 is
high, the system should then determine again whether the toggle bit is toggling or not, since the toggle
bit may have stopped toggling just as DQ5 went high. If the toggle bit is no longer toggling, the device
has successfully completed the program or erase operation. If it is still toggling, the device did not
complete the operation, and the system must write the reset command to return to reading array data.
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