W91031 Datasheet, PDF (7/29 Pages) Winbond – LOW POWER CMOS INTERGRATED CIRCUIT

Preliminary W91031
C1 = 0.1uF _{R1 = 470K}
Tip/A
Ring/B
C1 = 0.1uF
R2 = 470K
V_DD
W91031
R3 = 200K
RNGDI
R4 = 300K
VDD
R5=150K
RNGRC
C3 = 0.22uF
Allowance minimal ring voltage (peak to peak) is:
Vpp _{(max ring) = 2 (V T+(max) (R1 + R3 + R4) / R4 + 0.7)}
Tolerance to noise between Tip and Ring and Vss is:
Vpeak _{(max noise) = V T+(min) (R1 + R3 + R4) / R4 + 0.7}
Time constant is:
T = R5 C3 ln [VDD / (VDD - V _T+ )]
V _{T+(min) <= V T+ <= V T+(max)}
RNGON
R5 from 10K ohm to 500K ohm.
C3 from 47 nF to 0.68 uF.
Figure 7-1. Application Circuit of the Ring Detecter
The RC time constant of the RNGRC pin is used to delay the output pulse of the RNGON pin for a
low going edge on RNGDI. This edge goes from above the VT+ voltage to the Schmitt trigger low
going threshold voltage VT-. The RC time constant must be greater than the maximum period of the
ring signal, to ensure a minimum RNGON low interval and to filter the ring signal to get an envelope
output.
The diode bridge shown in Figure 7-1 works for both single ended ring signal and balanced ringing.
R1 and R2 are used to set the maximum loading and must be of equal value to achieve balanced
loading at both the tip and ring line. R1, R3 and R4 form a resistor divider to supply a reduced voltage
to the RNGDI input. The attenuation value is determined by the detection of minimal ring voltage and
maximum noise tolerance between tip/ring and ground.
Publication Release Date: August 2000
-7-
Revision A1