W91031 Datasheet, PDF (6/29 Pages) Winbond – LOW POWER CMOS INTERGRATED CIRCUIT

Preliminary W91031
BLOCK DIAGRAM
INP
INN
GCFB
VREF
SLEEP/
RESET
VDD
VSS
Input Pre-processor
+
Anti-alias
-
Filter
To internal
circuit
Bias Voltage
Generator
To internal
circuit
Oscillator
&
Clock Driver
FSKE
MODE
FSK Demodulation Circuit
FSK Bandpass
Filter
FSK
Demodulator
FSK Carrier
Detector
FSK
Data Output
Interface
Power Saving
Circuit
High Tone
Bandpass
Filter
Low Tone
Bandpass
Filter
Dual Tone Alert Signal Detection Circuit
High Tone
Detector
Low Tone
Detector
Guard
Time
Circuit
Interrupt
Generator
Ring Detector
DCLK
DATA
FDRN
FCDN
INTN
ALGO
ALGRC
ALGR
OSCI OSCO
RNGDI RNGRC RNGON
Figure 6. The Block Diagram of Winbond Caller ID
FUNCTIONAL DESCRIPTION
Figure 6 is shown functional blocks of W91031. The device must operate with a 3.579545 MHz
system clock and consists four major functions and decribed as follows:
Ring Detector
The application circuit in Figure 7-1 illustrates the relationship between the RNGDI, RNGRC and
RNGON signals. The three pin combination is used to detect an increase of the RNGDI voltage from
ground to a level above the Schmitt trigger high going threshold voltage VT+.
-6-