W742S81A Datasheet, PDF (6/47 Pages) Winbond – 4 BIT MICROCONTROLLER

W742S81A
6. FUNCTIONAL DESCRIPTION
6.1 Program Counter (PC)
Organized as an 14-bit binary counter (PC0 to PC13), the program counter generates the addresses of the
16384 × 16 on-chip ROM containing the program instruction words. Before the jump or subroutine call
instructions are to be executed, the destination ROM page must be determined firstly. The confirmation of
the ROM page can be done by executing the MOV ROMPR, #I or MOV ROMPR, R instruction. When the
interrupt or initial reset conditions are to be executed, the corresponding address will be loaded into the
program counter directly. The format used is shown below.
ITEM
Initial Reset
INT 0 (Divider0)
INT 1 (Timer 0)
INT 2 (Port RC)
INT 3 (Divider1)
INT 4 (Timer 1)
JP Instruction
Subroutine Call
ADDRESS
0000H
0004H
0008H
000CH
0014H
0020H
XXXXH
XXXXH
INTERRUPT
PRIORITY
-
1st
2nd
3rd
4th
5th
-
-
Table 1 Vector address and interrupt priority
6.2 Stack Register (STACK)
The stack register is organized as 49 bits x 16 levels (first-in, last-out). When either a call subroutine or an
interrupt is executed, the program counter will be pushed onto the stack register automatically. At the end
of a call subroutine or an interrupt service subroutine, the RTN instruction must be executed to pop the
contents of the stack register into the program counter. (Refer to Table 8) When the stack register is
pushed over the sixteen levels, the contents of the first level will be lost. In other words, the stack register
is always sixteen levels deep.
6.3 Program Memory (ROM)
The read-only memory (ROM) is used to store program codes; and the look-up table is arranged as 65536 x
4 bits. The program ROM is divided into eight pages; the size of each page is 2048 x 16 bits. So the total
ROM size is 16384 x 16 bits. Before the jump or subroutine call instructions are to be executed, the
destination ROM page must be determined firstly. The ROM page can be selected by executing the MOV
ROMPR,#I or MOV ROMPR, R instruction. But the branch decision instructions (e.g. JB0, SKB0, JZ, JC,
...) must jump to the same ROM page which the branch decision instructions are in. The whole ROM can
store both instruction codes and the look-up table. Each look-up table element is composed of 4 bits, so the
look-up table can be addressed up to 65536 elements. Instruction MOVC R is used to read the look-up
table content and transfer table data to the RAM. But before reading the addressed look-up table content,
the content of the look-up table pointer (TAB) must be determined firstly. The address of the look-up table
element is allocated by the content of TAB. The MOV TAB0 (TAB1, TAB2, TAB3), R instructions are
used to allocate the address of the wanted look-up table element. The TAB0 register stores the LSB 4 bits
of the look-up table address. The organization of the program memory is shown in Figure 6-1.
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