W742S81A Datasheet, PDF (16/47 Pages) Winbond – 4 BIT MICROCONTROLLER

W742S81A
6.12 Timer/Counter
6.12.1 Timer 0 (TM0)
Timer 0 (TM0) is a programmable 8-bit binary down-counter. The specified value can be loaded into TM0
by executing the MOV TM0L(TM0H),R instructions. When the MOV TM0L(TM0H),R instructions are
executed, it will stop the TM0 down-counting (if the TM0 is down-counting) and reset the MR0.3 to 0, and
the specified value can be loaded into TM0. Then we can set MR0.3 to 1, that will cause the event flag 1
(EVF.1) is reset and the TM0 starts to count. When it decreases and underflow to FFH, Timer 0 stops
operating and generates an underflow (EVF.1 = 1). Then, if the Timer 0 interrupt enable flag has been set
(IEF.1 = 1), the interrupt is executed, while if the hold release enable flag 1 has been set (HEF.1 = 1), the
hold state is terminated. The Timer 0 clock input can be set as FOSC/1024 or FOSC/4 by setting MR0.0 to 1
or resetting MR0.0 to 0. The default timer value is FOSC/4. The organization of Timer 0 is shown in
Figure 6-6.
If the Timer 0 clock input is FOSC/4:
Desired Timer 0 interval = (preset value +1) × 4 × 1/FOSC
If the Timer 0 clock input is FOSC/1024:
Desired Timer 0 interval = (preset value +1) × 1024 × 1/FOSC
Preset value: Decimal number of Timer 0 preset value
FOSC: Clock oscillation frequency
Fosc/1024
Fosc/4
1. Reset
2. CLR EVF,#02H
3. Reset MR0.3 to 0
4.MOV TM0L,R or MOV TM0H,R
MR0.0
Disable
Enable
Set MR0.3 to 1
8-Bit Binary
Down Counter
(Timer 0)
4
4
MOV TM0H,R MOV TM0L,R
SQ
R
EVF.1
HEF.1
IEF.1
Hold mode release (HCF.1)
Timer 0 interrupt (INT1)
1. Reset
2. CLR EVF,#02H
3.Set MR0.3 to 1
Figure 6-6 Organization of Timer 0
6.12.2 Timer 1 (TM1)
Timer 1 (TM1) is also a programmable 8-bit binary down counter, as shown in Figure 6-7. Timer 1 can
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