W742S81A Datasheet, PDF (22/47 Pages) Winbond – 4 BIT MICROCONTROLLER

W742S81A
Divider 0, Divider 1, Timer
0, Timer 1, Signal Change
at RC Port
Yes
Interrupt
Enable?
Yes
IEF
Flag Set?
Yes
No
No
In
No
HOLD
Mode?
No
Interrupt
Enable?
Yes
IEF
No
Flag Set?
Yes
Reset EVF Flag
Execute
Interrupt Service Routine
(Note)
HEF
Flag Set?
Reset EVF Flag
Execute
Interrupt Service Routine
No
Yes
(Note)
Disable interrupt
Disable interrupt
HOLD
Note: The bit of EVF corresponding to the interrupt signal will be reset.
PC <- (PC+1)
Figure 6-9 Hold Mode and Interrupt Operation Flow Chart
6.15.1 Hold Mode Release Enable Flag (HEF)
The hold mode release enable flag is organized as an 8-bit binary register (HEF.0 to HEF.7). The HEF is
used to control the hold mode release conditions. It is controlled by the MOV HEF, #I instruction. The bit
descriptions are as follows:
76543210
HEF w
w
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Note: W means write only.
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