W742S81A Datasheet, PDF (15/47 Pages) Winbond – 4 BIT MICROCONTROLLER

W742S81A
Bit 0 = 0 No time out.
= 1 Time out.
WDTR.0 will be set to one when WDT time out and can be reset to zero by:
Power On Reset, RESET pin, CLR WDT
Reset item
WDTR.1 = 1
WDTR.1 = 0
Program Counter (PC)
0000H
0000H
Stack Pointer (SP)
-
Reset
ROMPR, PAGE, DBKR, WRP, ACC, CF, ZF,
SCR registers
-
Reset
IEF, HEF, SEF, HCF, PEF, EVF flags
IEF = Reset
Reset
DIV0, DIV1
-
Reset
TM0, TM1, MR0, MR1 registers
-
Reset
Timer 0 input clock
-
FOSC/4
Timer 1 input clock
-
FOSC
MFP output
-
Low
PM0 register
-
Reset
PM1, PM2, PM5 registers
-
Set (1111B)
PSR0 register
-
Reset
Input/output ports RA, RB, RD
-
Input mode
Output ports RE, RF
-
High
RA, RB ports output type
-
CMOS type
RC port pull-high resistors
-
Disable
Input clock of the watchdog timer
-
FOSC/2048
DTMF output
-
Hi-Z
BUZCR register
-
Reset
FLCD
-
Q5 to Q9 Reset
LCD display
-
OFF
LCDR
-
Reset
Segment output mode
-: keep the status
Note: SCR.2 is reserved
-
LCD drive output
Table 2 The bit 1 of WatchDog Timer Register (WDTR) reset item
Publication Release Date: March 2003
- 15 -
Revision A1