W9425G6JH_13 Datasheet, PDF (34/52 Pages) Winbond – 4 M x 4 BANKS x 16 BITS DDR SDRAM

W9425G6JH
12. TIMING WAVEFORMS
12.1 Command Input Timing
tCK
CLK
CLK
CS
tCK
tIS
tIH
tCH
tCL
RAS
CAS
WE
A0~A12
BA0,1
tIS
tIH
tIS
tIH
tIS
tIH
tIS
tIH
Refer to the Command Truth Table
12.2 Timing of the CLK Signals
tCH
CLK
CLK
CLK
CLK
VX
tCL
tT
tCK
VX
tT
VX
VIH
VIH(AC)
VIL(AC)
VIL
VIH
VIL
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Publication Release Date: Aug. 27, 2013
Revision A03