W9425G6JH_13 Datasheet, PDF (24/52 Pages) Winbond – 4 M x 4 BANKS x 16 BITS DDR SDRAM

W9425G6JH
10.3 Capacitance
(VDD = VDDQ = 2.5V ± 0.2V, f = 1 MHz, TA = 25°C, VOUT (DC) = VDDQ/2, VOUT (Peak to Peak) = 0.2V)
SYMBOL
PARAMETER
MIN.
MAX.
CIN
Input Capacitance (except for CLK pins)
2.0
3.0
CCLK Input Capacitance (CLK pins)
2.0
3.0
CI/O
DQ, DQS, DM Capacitance
4.0
5.0
Note: These parameters are periodically sampled and not 100% tested.
DELTA
(MAX.)
0.5
0.25
0.5
UNIT
pF
pF
pF
10.4 Leakage and Output Buffer Characteristics
SYMBOL
PARAMETER
II (L)
IO (L)
VOH
VOL
IOH
IOL
Input Leakage Current
Any input 0V  VIN  VDD, VREF Pin 0V  VIN 1.35V
(All other pins not under test = 0V)
Output Leakage Current
(Output disabled, 0V  VOUT  VDDQ)
Output High Voltage
(under AC test load condition)
Output Low Voltage
(under AC test load condition)
Output Levels: Full drive option
High Current
(VOUT = VDDQ - 0.373V, min. VREF, min. VTT
Low Current
(VOUT = 0.373V, max. VREF, max. VTT)
IOHR
Output Levels: Reduced drive option - 60%
High Current
(VOUT = VDDQ - 0.763V, min. VREF, min. VTT
IOLR
IOHR₍₃₀₎
IOLR₍₃₀₎
Low Current
(VOUT = 0.763V, max. VREF, max. VTT)
Output Levels: Reduced drive option - 30%
High Current
(VOUT = VDDQ – 1.056V, min. VREF, min. VTT
Low Current
(VOUT = 1.056V, max. VREF, max. VTT)
MIN.
-2
-5
VTT +0.76
-
-15
15
-9
9
-4.5
4.5
MAX.
2
5
-
VTT -0.76
-
-
-
-
-
-
UNIT
µA
µA
V
V
mA
mA
mA
mA
mA
mA
NOTES
4, 6
4, 6
5
5
5
5
- 24 -
Publication Release Date: Aug. 27, 2013
Revision A03