W49V002A Datasheet, PDF (16/32 Pages) Winbond – 256K x 8 CMOS FLASH MEMORY WITH LPC INTERFACE

Preliminary W49V002A
Programmer Interface Mode AC Characteristics, continued
AC Characteristics
Read Cycle Timing Parameters
(VDD = 3.3V ± 5%, V GND = 0V, TA = 0 to 70° C)
PARAMETER
SYM.
Read Cycle Time
Row / Column Address Set Up Time
Row / Column Address Hold Time
Address Access Time
Output Enable Access Time
#OE Low to Active Output
#OE High to High-Z Output
Output Hold from Address Change
TRC
TAS
TAH
TAA
TOE
TOLZ
TOHZ
TOH
W49V002A
MIN.
MAX.
300
-
50
-
50
-
-
200
-
100
0
-
-
50
0
-
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
Write Cycle Timing Parameters
PARAMETER
Reset Time
Address Setup Time
Address Hold Time
R/#C to Write Enable High Time
#WE Pulse Width
#WE High Width
Data Setup Time
Data Hold Time
#OE Hold Time
Byte programming Time
Erase Cycle Time
SYMBOL
TRST
TAS
TAH
TCWH
TW P
TWPH
TD S
TDH
TOEH
TBP
TEC
MIN.
1
50
50
50
100
100
50
50
0
-
-
TYP.
-
-
-
-
-
-
-
-
-
50
0.15
MAX.
-
-
-
-
-
-
-
-
-
100
0.2
UNIT
µS
nS
nS
nS
nS
nS
nS
nS
nS
µS
S
Note: All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is input high and (b) low level signal's reference level is input low.
Ref. to the AC testing condition.
Data Polling and Toggle Bit Timing Parameters
PARAMETER
#OE to Data Polling Output Delay
#OE to Toggle Bit Output Delay
SYM.
TOEP
TOET
W49V002A
MIN.
MAX.
-
40
-
40
UNIT
nS
nS
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