W25X05CLUXIG-TR Datasheet, PDF (11/47 Pages) Winbond – 1M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI

W25X10CL
8.1.5 Reserved Bits
Status register bit location S6 and S4 are reserved for future use. Current devices will read 0 for this
bit location. It is recommended to mask out the reserved bit when testing the Status Register. Doing
this will ensure compatibility with future devices.
8.1.6 Status Register Protect (SRP)
The Status Register Protect (SRP) bit is a non-volatile read/write bit in status register (S7) that can be
used in conjunction with the Write Protect (/WP) pin to disable writes to status register. When the SRP
bit is set to a 0 state (factory default) the /WP pin has no control over status register. When the SRP
pin is set to a 1, the Write Status Register instruction is locked out while the /WP pin is low. When the
/WP pin is high the Write Status Register instruction is allowed.
SRP
/WP
Status
Register
Description
Software /WP pin has no control, The Status register can be written to
0
X
Protection after a Write Enable instruction WEL = 1. [Factory Default]
Hardware When /WP pin is low the Status Register locked and can’t be
1
0
Protected written to.
Hardware When /WP pin is high the status register is unlocked and can
1
1
Unprotected be written to after a Write Enable instruction WEL = 1.
S7 S6 S5 S4 SS3 SS2 SS1 SS0
SRP (R)
TB
(R)
BP 1 BP0 WEL BUSY
STATUS REGISTER PROTECT
(Non-volatile)
RESERVED
TOP/BOTTOM PROTECT
(Non-volatile)
BLOCK PROTECT BITS
(Non-volatile)
WRITE ENABLE LATCH
(volatile)
ERASE/WRITE IN PROGRESS
(volatile)
Figure 3. Status Register Bit Locations
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Publication Release Date: February 17, 2014
Revision G