TC94A29FB Datasheet, PDF (8/20 Pages) Toshiba Semiconductor – TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC94A29FAG/FB
Pin
No.
Symbol
Pin Name
Function and Operation
Remarks
I/O port 1-0
The P1-0 pin has multiplexed functions for
P1-0/SCK1
/RX1
/serial clock
input/output 1
general-purpose counter input. The input
frequency is 0.1 MHz to 20 MHz. The counter
MV_DD
10
/CTin
/serial receive data 1 incorporates an input amplifier and operates
/DATA
/counter clock input with capacitance-coupled small amplitudes. The
(BRK10)
/CD processor counter is a 20-bit counter and can store 20-bit
function
data directly in memory. The gate time can be
selected from among 1 ms, 4 ms, 16 ms and 64
I/O port 1-1
ms (when the 75-kHz crystal oscillator is used).
P1-1/SDIO1
/serial data
In manual mode, the gate can be turned on and
11
/TX1
/SFSY
(BRK11)
input/output 1
off within the specified time using instructions.
/serial transmit data 1
/CD processor The P1-0 to P1-2 and P7-0 to P7-2 pins have
function
multiplexed functions for serial interface (SIO)
Input
instruction
Release
enable
MV_SS
MV_DD
circuit input/output pins.
12
P1-2/SI1
/SBSY
(BRK12)
I/O port 1-2
/serial data input 1
/CD processor
function
The SIO is a serial interface supporting 2-line
and 3-line methods as well as UART. The
TC94A29FAG/FB has CMOS input/output pins
(SCK1/RX1, SDIO1/TX1, SI1) and N-channel
(When used for I/O port)
R_fIN
open-drain (supporting up to 5.5 V) input/output
pins (SCK2/RX2, SDIO2/TX2, SI2). One of the
two sets of pins can be selected as serial
MV_DD
interface. The serial interface circuit supports
13
P1-3/BUZR
(BRK13)
I/O port 1-3
/buzzer output
various options, including the number of the
clock edge to be used, the serial clock
input/output, and the clock frequency. These
CTin
MV_SS
options facilitate controlling the LSI and
communications between the controllers. When
SIO interrupts are enabled, an interrupt is
(When P1-0 is used for
general-purpose counter)
generated as soon as execution of the SIO
completes, causing the program to jump to
14
P7-0/SCK2
/RX2
(BRK14)
I/O port 7-0
/serial clock
input/output 2
/serial receive data 2
address 4.
The P1-3 pin has multiplexed functions for a
buzzer output pin. One of four frequencies
within the range from 0.75 kHz, 1 kHz, 1.5 kHz
15
P7-1/SDIO2
/TX2
(BRK15)
I/O port 7-1
/serial data
input/output 2
/serial transmit data 2
and 3 kHz can be selected for buzzer output
(when the 75-kHz clock is used). The buzzer is
driven at the selected frequency in one of four
modes: continuous, single-shot, 10-Hz
intermittent, and 10-Hz intermittent at 1-Hz
intervals.
The P7-2 pin has multiplexed functions for an
external interrupt input pin. When interrupts are
enabled and a pulse of 1.65 ms to 4.96 ms or
more (13.3 ms to 40 ms when the 75-kHz clock is
Input
used) is applied to this pin, an interrupt is
instruction
generated and the program jumps to address 1. Release
The input logic and rising/falling edge can be
enable
selected for interrupt inputs. This input can be
P7-2/INTR
I/O port 7-2
applied as the clock gate signal to the internal
16
/SI2
/interrupt input 8-bit timer/counter, which allows input pulse
(BRK16)
/serial data input 2 width to be detected and measured.
MV_SS
MV_DD
(Note) Backup release is enabled or disabled
in port units.
(Note) Upon a system reset, the pins are set to
I/O port input.
(Note) When the 32.768-kHz crystal oscillator
or the CR oscillator is used, the
general-purpose counter is used as a
timer.
8
2003-04-01