TC94A29FB Datasheet, PDF (16/20 Pages) Toshiba Semiconductor – TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC94A29FAG/FB
PDO, TMAX, RFGC, TEBC, FMO, DMO, TRO, FOO, and SEL output
Parameter
High level
Output current
Low level
Output resistance
V_REF output ON resistance
Symbol
Test
Circuit
Test Condition
I_OH6
I_OL4
¾ ^{VOH = 2.9 V (SEL, TMAX)}
V_OL = 0.4 V (SEL, TMAX)
R_out3
R_out4
R_on
(RFGC, TEBC, FMO, DMO, TRO, FOO)
¾
(PDO)
¾ (RFGC, TEBC, FMO, DMO, PDO)
Min Typ. Max Units
-2.0 ¾
¾
mA
2.0
¾
¾
¾
3.0
¾
kW
¾
5.0
¾
¾
¾
500
W
Transfer delay time (BCK, LRCK, AOUT, DOUT, IPF, SBOK, CLCK, DATA, SFSY, SBSY)
Parameter
Transfer delay ^{High level}
time
Low level
Symbol
Test
Circuit
t_pLH
¾
t_pHL
Test Condition
¾
¾
Min Typ. Max
¾
10
¾
¾
10
¾
Units
ns
CD processor AD conversion block (FEI, TEI, RFRP, SBAD)
Parameter
Resolution
Sampling frequency
Symbol
Test
Circuit
Test Condition
¾
¾ (FEI, TEI, RFRP, SBAD)
(FEI, TEI, RFRP)
¾
¾
(SBAD)
Conversion input range
¾
¾ AV_DD = 3.3 V (FEI, TEI, RFRP, SBAD)
Min Typ. Max Units
¾
8
¾
bit
¾ 176.4 ¾
kHz
¾ 88.2 ¾
0.15 ´
AV_DD
¾
0.85 ´
AV_DD
V
CD processor DA conversion block (focus tracking system)
Parameter
Number of bits
Sampling frequency
Conversion output range
Symbol
Test
Circuit
Test Condition
¾
¾ (FOO, TRO)
¾
¾ (FOO, TRO)
¾
¾ AV_DD = 3.3 V (FOO, TRO)
Min Typ. Max Units
¾
5
¾
bit
¾
2.8
¾ MHz
AV_SS ¾ AV_DD V
CD processor PLL/VCO block
Parameter
Input/output signal range
Frequency characteristic
Oscillation center frequency
Frequency variable range
Symbol
Test
Circuit
Test Condition
¾
¾ (LPFN, LPFO)
¾
¾ (LPFN-LPFO) -3dB point (Gain = 1)
¾
¾ LPFO = V_REF
[VCOGSL] bit = Low
¾
¾
[VCOGSL] bit = High
Min Typ. Max Units
AV_SS ¾ AV_DD V
¾
8
¾ MHz
¾
34
¾ MHz
-30 ¾ +30
%
-40 ¾ +40
CD processor comparator (TEZI, RFZI)
Parameter
Input range
Hysteresis voltage
Input resistance
Symbol
Test
Circuit
Test Condition
¾
¾ (TEZI, RFZI)
¾
¾ (TEZI, RFZI) V_REF reference
Z_in2
¾ (TEZI, RFZI)
Min Typ. Max Units
AV_SS ¾ AV_DD V
-50 ¾ +50 mV
¾
10
¾
kW
16
2003-04-01