TC94A29FB Datasheet, PDF (15/20 Pages) Toshiba Semiconductor – TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC94A29FAG/FB
General-purpose counter (CTin)
Parameter
Frequency range
Input amplitude range
Operating power supply
current
Input amplifier feedback
resistance
Test
Symbol _Circuit
Test Condition
Min
f_CT
¾ V_IN = 0.2 V_P-P
(Note 4) 0.1
V_CT
¾
(Note 4) 0.2
I_DD-CT
¾
General-purpose counter operating current,
f_in = 20 MHz
¾
R_fIN
¾ (CTin)
200
Typ. Max Units
¾
20 MHz
¾
2.0 V_P-P
0.7
¾
mA
350 1000 kW
Note 4: The values are guaranteed when CV_DD = MV_DD = DV_DD = AV_DD = 3.0 to 3.6 V, Ta = -40 to 85°C.
LCD common and segment outputs (COM1 to COM4, S1 to S16)
Parameter
Symbol
Test
Circuit
Test Condition
High level
Output current
Low level
I_OH1
I_OL1
¾ ^{VOH = 2.9 V (LCD output)}
V_OL = 0.4 V (LCD output)
1/2 level
V_BS2
No load (common output, 1/2 bias method)
Bias current
1/3 level
2/3 level
V_BS1
V_BS3
¾
No load (LCD output, 1/3 bias method)
LCD operating power supply
current
I_DD-LCD
¾ LCD driver operating current
Min
¾
¾
2.3
1.47
3.13
¾
Typ. Max
-300 ¾
450 ¾
2.5 2.7
1.67 1.87
3.33 3.53
50
¾
Units
mA
V
mA
I/O ports (P1-0 to P6-3, P8-0, P8-1, P7-0 to P7-3)
Parameter
Output current
High level
Low level
Input leakage current
Symbol
Test
Circuit
Test Condition
I_OH2
I_OL2
V_OH = 2.9 V (P1-0~P6-3, P8-0, P8-1)
¾ V_OL = 0.4 V (P1-0~P6-3, P8-0, P8-1)
I_OL3
V_OL = 0.4 V (P7-0 to P7-3)
V_IH = 3.3 V,
I_LI
¾ ^{VIL = 0 V (P1-0 to P6-3, P8-0, P8-1)}
V_IH = 5.5 V, V_IL = 0 V (P7-0 to P7-3)
High level
V_IH
¾
Input voltage
¾
Low level
V_IL
¾
Input pull-up/down resistance
R_IN1
R_IN2
(P6-0 to P6-3, P8-0, P8-1)
¾ ^{Pull-down/up specified}
(P3-0) Test input pulled down
Min Typ. Max Units
-1.0 -2.0 ¾
1.0
2.0
¾
mA
5
15
¾
¾
¾ ±1.0
mA
¾
¾ ±1.0
V_DD ´
0.8
~
MV_DD
V
0
~
MV_DD
´ 0.2
25
50 120
kW
¾
10
¾
AD converter (ADin1 to ADin4)
Parameter
Symbol
Test
Circuit
Test Condition
Min
Analog input voltage range
V_AD
¾ ADin1 to ADin4
0
Resolution
V_RES
¾
¾
¾
Total conversion error
MV_DD = 1.8~3.6V, Ta = -30~75°C (Note 6) ¾
¾
¾
MV_DD = 2.0~3.6V, Ta = -40~85°C (Note 6) ¾
Analog input leakage current
I_LI
¾ V_IH = 3.3 V, V_IL = 0 V (ADin1 to ADin4)
¾
Note 6: The values are guaranteed when CV_DD = DV_DD = AV_DD = 3.0 to 3.6 V.
Typ. Max Units
~ MV_DD V
6
¾
bit
¾ ±2.0
LSB
¾ ±1.0
¾ ±1.0 mA
15
2003-04-01