TC94A29FB Datasheet, PDF (3/20 Pages) Toshiba Semiconductor – TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

Pin Connections
TC94A29FAG/FB
Reset input
RESET
P8-0/MXI/OSC (BRK1)
P8-1/MXO (BRK2)
P2-0/COM1
P2-1/COM2
P2-2/COM3
P2-3/COM4
TEST/P3-0/S1
P3-1/S2
P3-2/S3
P3-3/S4
P4-0/S5
P4-1/S6
P4-2/S7
P4-3/S8
P5-0/S9
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
49
1-bit DAC
16.9344-MHz
32
oscillator
50
75-kHz /
31
51
32.768-kHz/CR
30
52
29
53
28
54
27
55
26
56
LQFP/QFP-64
25
(0.5/0.65-mm pitch)
57
Top view
24
58
23
59
22
60
21
61
20
62
19
63
AD converter
Serial interface 1
18
64
Controller-dedicated pins
17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
TEZI
TEI
SBAD
FEI
RFRP
RFZI
V_REF
AV_DD
RFI
SLCO
AV_SS
VCOF
LPFO
LPFN
TMAX
PDO
Pull-up/pull-down can be specified.
CMOS I/O ports (up to 26 ports)
Also used for CD function
Note:
Note:
For BRK1 to BRK16, the backup state can be set to be released in
port units.
The TEST pin (pin 56) is pulled down during a reset, thus accepting
test mode input. Therefore, it should be applied low or left open
during a reset.
N-ch open-drain I/O
(3 pins, 5.5 V max.)
Serial interface 2
3
2003-04-01