TMPR3927 Datasheet, PDF (399/512 Pages) Toshiba Semiconductor – 32-Bit TX System RISC TX39 Family

Chapter 15 Parallel I/O Port (PIO)
15.2.5 PIO Open-Drain Control Register (XPIOOD) 0xFFFE_E50C
31
16
0
15
POD
[15]
14
POD
[14]
13
POD
[13]
12
POD
[12]
11
POD
[11]
10
POD
[10]
9
POD
[9]
8
7
POD POD
[8] [7]
R/W
0x0000
6
POD
[6]
5
POD
[5]
4
POD
[4]
3
POD
[3]
2
POD
[2]
1
POD
[1]
: Type
: Initial value
0
POD
[0]
: Type
: Initial value
Bits
15:0
Mnemonic
POD[15:0]
Field Name
Open-Drain
Control
Description
Port Open-Drain Control [15:0] (initial value: 0x0000)
Specifies whether to configure the PIO[15:0] pins as open-drain outputs or totem-
pole outputs.
0: Open-drain (Reset)
1: Totem-pole
Figure 15.2.4 PIO Open-Drain Control Register
15-5