TC94A48FG Datasheet, PDF (19/36 Pages) Toshiba Semiconductor – Single-chip Audio Digital Signal Processor

TC94A48FG
2.2 I²C Bus Mode
2.2.1 Data Transfer Format in I²C Bus Mode
Figure 10 shows the data transfer format in I²C bus mode.
In I²C bus mode, the host microcontroller first transfers an I²C address (write = 30h) and then checks
that the ACK bit is low. If the ACK bit is high, it retransmits a start condition (without transmitting a
stop condition) and then transfers an I²C address of 30h. After transferring an I²C address, the host
microcontroller transfers a 24-bit command. When the host microcontroller writes data to the
TC94A48FG, it writes as many 24-bit data words as specified with the 24-bit command (1 to 8 words)
and then transfers an end condition.
When the host microcontroller reads data from the TC94A48FG, it transfers a 24-bit command and
then, without transmitting an end condition, transfers an I²C address (read =31h) and check that the
ACK bit is low. If the ACK bit is high, the host microcontroller retransmits a start condition (without
transmitting a stop condition) and then transfers an I²C address of 31h. After checking that the ACK
bit is low, the host microcontroller reads as many 24-bit data words as specified with the 24-bit
command (1 to 8 words). During a read, the host microcontroller sets the ACK bit to low after reading
every eight bits. The ACK bit accompanying the last eight bits must be set to high, after which the
host microcontroller transmits a stop condition. When transferring only a 24-bit command without
reading or writing data, transmit an end condition after transferring the command.
Figures 11 to 13 show the data transfer formats for writing, reading, and transferring a command
only.
SDA
I²C Address(30h) R/W ACK
DATA Hi(8bit) ACK DATA Mid(8bit)
DATA Low(8bit) ACK
SCL
I²C Address
Start Condition
24bit Command and 24bit DATA (1～8word)
Figure 10 Data Transmission Format in I²C Mode
Stop Condition
(30h)
24bit COMMAND
24bit Write DATA(1word～ 8word)
START I²C Address W A COMMAND(H) A COMMAND(M) A COMMAND(L) A DATA(H) A DATA(M) A
DATA(L) A STOP
Each ACK signal sent from TC94A48FG to Host
An interval of at least 1fs(32μs@1fs=32kHz) is required before next START
Figure 11 Format for Writing
(30h)
24bit COMMAND
(31h)
24bit Read DATA(1word～ 8word)
START I2C Address W A COMMAND(H) A COMMAND(M) A COMMAND(L) A
START I2C Address R A RD(H) A RD(M) A
Each ACK signal sent from TC94A48FG to Host
RD(L) A STOP
An interval of at least 1fs(32μs@1fs=32kHz)
is required before next START
These ACK signals are sent from host to TC94A48FG
This ACK signal is set to “H” by the Host
Figure 12 Format for Reading
(30h)
24bit COMMAND
START I²C Address W A _COMMAND(H) A _COMMAND(M) A COMMAND(L) A
Each ACK signal sent from
TC94A48FG to Host
STOP
Figure 13 Format for Transferring a Command Only
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2005-09-28