TC94A48FG Datasheet, PDF (18/36 Pages) Toshiba Semiconductor – Single-chip Audio Digital Signal Processor

TC94A48FG
(4) Triggering and terminating a soft reset
A soft reset is required before the system can start a program after program boot or restart a
program.
A 24-bit command with its soft reset bit set to "1" triggers a soft reset and a command with the bit
cleared terminates a soft reset.
When trigging or terminating a soft reset, drive /MICS high after transferring the 24-bit command
because no data needs to follow the command.
Figure 9 shows the procedure for trigging or terminating a soft reset.
／ＭＩＣＳ＝“Ｌ”
Check MＩＡＣＫ = “Ｌ”
(If MIACK = “H” , wait until MIACK = “L”)
If a malfunction occurs, perform a
hard reset prior to a soft reset.
Transfer 24-bit command
(soft reset ON/OFF = 0000x0h)
“1” triggers a reset
“0” terminates a reset
／ＭＩＣＳ＝“Ｈ”
Soft reset triggered or terminated
Figure 9 Procedure for Trigging or Terminating a Soft Reset
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2005-09-28