TC94A48FG Datasheet, PDF (10/36 Pages) Toshiba Semiconductor – Single-chip Audio Digital Signal Processor

TC94A48FG
1.5 Audio Input/Output Format
1.5.1 Audio Serial Data Input Format
The TC94A48FG supports MSB-first input only. In slave mode, it supports all setting formats for
the number of bit clock slots. In master mode, it does not support 24 slots.
M = MSB
MO
DE
Number
of
Slots
Data Word
Length
(bit)
0
16
16
L _{= LSB}
don't care(invalid data, padded with "0" when read by DSP
internal firmware)
Format
MSB-
justified
(LSB-
justified)
Timing Chart
M
L
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Remarks
Initial
Value
1
I²S
M
L
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
2
MSB-
justified
M
L
1
5
1
4
1
3
1
2
1
1
1
0
9
8
7
6
5
4
3
2
1
0
3
16
LSB-
justified
M
15
4 24
I²S
MSB-
5
justified
(LSB-
justified)
24
M
15
M
23
L
0
Unavailable
in master
L
mode(Note)
0
L
0
6
I²S
M
L
23
0
7
MSB-
justified
M
L
15
0
8
16
LSB-
justified
M
L
15
0
9
32
10
I²S
MSB-
justified
M
15
M
23
L
0
L
0
11
24
LSB-
justified
M
L
23
0
12
I²S
M
L
23
0
Note 4: These formats cannot be used in master mode (when LRCK and BCK are supplied to external devices).
10
2005-09-28