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TLC5948A Datasheet, PDF (9/50 Pages) Texas Instruments – 16-Channel, 16-Bit, ES-PWM, Full Self-Diagnosis LED Driver
TLC5948A
www.ti.com
SBVS192 – MARCH 2012
SIN
GS0
0A
tSU0
SCLK
GS Data Write
Low
GS15 GS15
15B 14B
tH0
GS15
13B
GS15
12B
tWH0
123 45
tWL0
GS0 GS0 GS0
3B
2B
1B
GS0
0B
tH1
254 255 256 257
GSCLK
65534
65536
65535
LAT
BLANK Bit
In First Control Data Latch
(Internal)
Data = 0
GS Data Write
Low
GS15
15C
GS15
14C
GS15
13C
GS15
12C
GS15
11C
GS15
10C
tSU1
1234567
tGSCLK
tWH1
123456
tWH2
tWL1
tSU2, tSU3
Grayscale Data
In First GS Data Latch
(Internal)
Grayscale Data
In Second GS Data Latch
(Internal)
SOUT Low
tD0
LOD LOD
15
14
LOD
13
LOD
12
Old Data
Old Data
(1)
RSV
RSV
RSV
RSV
tD0
Low
New Data (GSn-nB)
The data in the 257-bit common shift register are copied
to the first and second GS data latches when the display
timing reset is enabled.
New Data (GSn-nB)
LOD
15
LOD
14
LOD
13
LOD
12
LOD
11
LOD
10
LOD
9
tR0/tF0
Display Timing Reset Enabled, Auto Display Repeat Disabled, All GS Data Are FFFFh
OFF
(VOUTnH)
tR1
OUT0, 7, 8, 15
ON
(VOUTnL)
tD2
OFF
OUT1, 6, 9, 14
ON
tD3
OFF
OUT2, 5, 10, 13
ON
tD4
OFF
OUT3, 4, 11, 12
ON
tD5
Display Timing Reset Enabled, Auto Display Repeat Disabled, All GS Data Are 0001h
OFF
OUT0, 7, 8, 15
ON
OFF
OUT1, 6, 9, 14
ON
OFF
OUT2, 5, 10, 13
ON
OFF
OUT3, 4, 11, 12
ON
tF1
tD2
tD3
tD4
tD5
tD2
tOUTON(2)
tD3
tOUTON
tD4
tOUTON
tD5
tOUTON
(1) RSV = reserved.
(2) tOUTON refers to tON_ERR = tOUTON – tGSCLK.
Figure 9. Grayscale Data Write Timing
Copyright © 2012, Texas Instruments Incorporated
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