TLC5948A Datasheet, PDF (35/50 Pages) Texas Instruments – 16-Channel, 16-Bit, ES-PWM, Full Self-Diagnosis LED Driver

TLC5948A
www.ti.com
SBVS192 – MARCH 2012
STATUS INFORMATION DATA (SID)
The status information data (SID) contain the status of the LED open detection (LOD), LED short detection
(LSD), output leakage detection (OLD), pre-thermal warning (PTW), thermal error flag (TEF), and IREF short flag
(ISF). When the LAT rising edge for a GS data write is input, the SID overwrite the common shift register data
after the data in the common shift register are copied to the GS latch. If the common shift register MSB is '1', the
SID data are not copied to the common shift register.
After being copied into the common shift register, new SID data cannot be copied until at least one new bit of
data is written into the common shift register. Otherwise, the LAT signal is ignored. To recheck SID without
changing the GS data, reprogram the common shift register with the same data currently programmed into the
GS latch. When LAT goes high, the GS data do not change, but the SID data are loaded into the common shift
register. LOD, LSD, OLD, PTW, TEF, and ISF are shifted out of SOUT with each SCLK rising edge. The SID
load configuration and SID read timing are shown in Figure 33 and Table 17, respectively.
SOUT
Reserved
Bits[7:0]
LOD
Data
OUT[15:8]
Reserved
Bits[7:0]
LOD
Data
OUT[7:0]
Reserved
Bits[7:0]
LSD
Data
OUT[15:8]
Reserved
Bits[7:0]
LSD
Data
OUT[7:0]
Reserved
Bits[7:0]
OLD
Data
OUT[15:8]
Reserved
Bits[7:0]
OLD
Data
OUT[7:0]
Reserved
Bits[7:0]
TEF
PTW
ISF
Reserved
Bits
[156:0]
MSB
LSB
Common Common Common Common Common Common Common Common Common Common Common Common Common Common Common Common
Data Bit Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits Data Bits
256 [255:248] [247:240] [239:232] [231:224] [223:216] [215:208] [207:200] [199:192] [191:184] [183:176] [175:168] [167:160] [159:152] [151:149] [148:0]
SID are loaded to the
common shift register
at the rising edge of
LAT when the common
shift register MSB is ‘0’.
SIN
SLCK
Common Shift Register (257 Bits)
Figure 33. SID Load Configuration
Table 17. SID Load Description
COMMON SHIFT
REGISTER BIT NUMBER
LOADED SID DESCRIPTION
256
No data loaded
[255:248]
Reserved
LED open detection (LOD) data of OUT[15:8]
[247:240]
The bit assignment of the output channels is:
Bit 240 = OUT8 LOD
Bit 241 = OUT9 LOD
…
Bit 246 = OUT14 LOD
Bit 247 = OUT15 LOD
0 = Normal operation
1 = LED is open or connected to GND with low resistance
[239:232]
Reserved
LOD data of OUT[7:0]
[231:224]
The bit assignment of the output channels is:
Bit 224 = OUT0 LOD
Bit 225 = OUT1 LOD
…
Bit 230 = OUT6 LOD
Bit 231 = OUT7 LOD Bit data meaning
0 = Normal operation
1 = LED is open or connected to GND with low resistance
[223:216]
Reserved
Copyright © 2012, Texas Instruments Incorporated
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