TLC5948A Datasheet, PDF (34/50 Pages) Texas Instruments – 16-Channel, 16-Bit, ES-PWM, Full Self-Diagnosis LED Driver

TLC5948A
SBVS192 – MARCH 2012
BIT 135
0
PSMODE
0
1
1 (default)
Table 15. PSM Select Truth Table: Bits[135:134]
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BIT 134
0
1
0
1 (default)
POWER-SAVE MODE (PSM) FUNCTION
Power-save mode is disabled in every condition
When all '0's are written into the second GS data latch, the device goes into
power-save mode. When an SCLK rising edge occurs, the device goes to normal
operation and starts to control the output current. However, it takes some recovery
time (t_D7) to resume normal operation after an SCLK rising edge.
When all '0's are written into the second GS data latch, the device goes into
power-save mode. When the data (except all '0's) are written into the second GS
data latch, the device goes to normal operation and starts to control the output
current. However, it takes some recovery time (t_D7) to resume normal operation
after the data changes.
Power-save mode is enabled in every condition. When the device is powered up,
this mode is selected.
PSMODE
BIT 136
0
1 (default)
Table 16. PSM Select Truth Table: Bit[136]
POWER-SAVE MODE (PSM) FUNCTION
The GSCLK signal is used for GS timing control in the same manner as in normal mode even if the
device is in power-save mode.
When the device is in power-save mode, the GSCLK signal is forced low internally and GS timing
control logic is not operational in order to reduce power consumption. However, if the lower two bits of
PSMODE (bits[135:134]) are set to '0', the GSCLK signal is not forced low because the PSM is disabled.
When the device is powered up, this mode is selected.
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