TLC5948A Datasheet, PDF (40/50 Pages) Texas Instruments – 16-Channel, 16-Bit, ES-PWM, Full Self-Diagnosis LED Driver

TLC5948A
SBVS192 – MARCH 2012
www.ti.com
POWER-SAVE MODE (PSM)
The power-save mode control bits are assigned in the function control data latch. The device dissipation current
becomes 10 µA (typ) in this mode. When the two lower bits in PSMODE are '01', '10', or '11', the power-save
mode is enabled. When the lower two bits are '01' or '10', and if all '0' data are written in the second GS data
latch, the TLC5948A goes into power-save mode. When an SCLK rising edge is generated with the lower two
PSMODE bits (bits[135:134]) set to '01', the device leaves PSM for normal operation. OUTn are turned on at the
first GSCLK of the next display period after the device has left PSM. Figure 36 shows the power-save mode
timing diagram.
SIN ^Low
SCLK
LAT
1
2
3
BLANK Bit
in Control Data Latch _'1'
(Internal)
PSMODE Bit
in Control Data Latch
(Internal)
X01b or X10b
First GS Data Latch
(Internal)
Second GS Data Latch
(Internal)
OUT0, 7, 8, 15
ON or OFF
OUT1, 6, 9, 14
ON or OFF
OUT2, 5, 10, 13
OUT3, 4, 11, 12
Power-Save Mode
ON or OFF
ON or OFF
Normal Mode
255 256 257
1
2
3
4
5
6
¼
Previous On/Off Data
Previous On/Off Data
Normal Mode
All Data Are '0'
First and second GS data latches are
changed simultaneously because the BLANK bit is '1'.
All Data Are '0'
OFF
ON
OFF
ON
OFF
ON
OFF
ON
Power-Save Mode
Normal Mode
ICC
(VCC Current)
Greater Than 1 mA
Approximately 10 mA
Figure 36. Power-Save Mode Timing (Bits 135 and 134 = 01)
40
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