GC6016 Datasheet, PDF (9/46 Pages) Texas Instruments – Wideband Transmit-Receive Digital Signal Processors

GC6016
www.ti.com
SLWS227A – NOVEMBER 2010 – REVISED MARCH 2011
Pin Functions
NAME
NUMBER
TYPE
DESCRIPTION
POWER AND BIASING
VDD
E6, E7, E8, E9, E10, E11, E12, E13, E14, E15, E16, F9,
F11, F13, F15, F18, G18, H5, J5, J18, L18, N5, N18, P18,
R5, T18, U5, U8, U10, U12, U14, U15, U18, V7, V8, V9,
V10, V11, V12, V13, V14, V15, V16
PWR 1.1-V power supply
VDDSHV2
U9, U11, U13
PWR 3.3-V power supply for CMOS I/O
VDDSHV1
F8, F10, F12, F14
PWR 3.3-V power supply for CMOS I/O
VDDS1
F16, H18, K18, M18, R18, U16,
PWR 1.8-V power supply for LVDS I/O
VDDS2
F7, G5, K5, M5, U7
PWR 1.8-V power supply for LVDS I/O
VPP
W8, W10
PWR 1.1-V E-fuse supply, connect to VDD
VDDMON
Y8
NC Do not connect, internal monitor point
VSSMON
AA8
NC Do not connect, internal monitor point
VDDA2
B17
PWR 1.8-V power for PLL (requires filtering)
VDDA1
D5
PWR 1.8-V power for PLL (requires filtering)
VSSA2
A16
PWR Ground for PLL (requires filtering)
VSSA1
C5
PWR Ground for PLL (requires filtering)
VSS
D8, D10, D12, D14, G6, G7. G8, G9, G10, G11, G12, G13,
G14, G15, G16, G17, H6, H7, H8, H9, H10, H11, H12, H13,
H14, H15, H16, H17, J6, J7, J8, J9,J10, J11, J12, J13, J14,
J15, J16, J17, K6, K7, K8, K9, K10, K11, K12, K13, K14,
K15, K16, K17, L6, L7, L8, L9, L10, L11, L12, L13, L14,
L15, L16, L17, M6, M7, M8, M9, M10, M11, M12, M13, M14,
M15, M16, M17, N6, N7, N8, N9, N10, N11, N12, N13, N14,
N15, N16, N17, P6, P7, P8, P9, P10, P11, P12, P13, P14,
P15, P16, P17, R6, R7, R8, R9, R10, R11, R12, R13, R14,
R15, R16, R17, T6, T7, T8, T9, T10, T11, T12, T13, T14,
T15, T16, T17,W9, W11, W13
PWR
Ground
NC
E17, E18, F6, F17, U6, U17, V5, V6, V17, V18
NC No connection. Recommend connecting to ground
NC
A1, A22, D1, D4, W3, W18, AA22, AB1, AB5, AB22,
NC No connection
BASEBAND INPUT/OUTPUT
BBIN[11:0]P
E4, E2, D3, C2, B2, C3, A2, A3, A4, C6, A5, C7
I Baseband input – LVDS positive
BBIN[11:0]N
E5, E3, D2, C1, B1, C4, B3, B4, B5, D6, B6, D7
I Baseband input – LVDS negative
BBOUT[11:0]P L4, K2, K4, J2, J4, H2, H4, G2, G4, F3, F5, E1
O Baseband output – LVDS positive
BBOUT[11:0]N L5, K1, K3, J1, J3, H1, H3, G1, G3, F2, F4, F1
O Baseband output – LVDS negative
TX DAC INTERFACE
TXA[19:0]P
K20, K22, J19, J22, H19, H22, G19, G21, F20, F22, D22,
E21, E20, E19, C22, C20, C19, A21, B20, C18
O DAC TX port A – LVDS positive
TXA[19:0]N
K19, K21, J20, J21, H20, H21, G20, G22, F19, F21, E22,
D21, D20, D19, B22, C21, D18, B21, A20, B19
O DAC TX port A – LVDS negative
TXB[19:0]P
Y20, Y22, W19, W21, V19, V22, U19, U21, T19, T21, R19,
R21, P19, P21, N19, N21, M19, M21, L19, L21
O DAC TX port B – LVDS positive
TXB[19:0]N
Y19, Y21, W20, W22, V20, V21, U20, U22, T20, T22, R20,
R22, P20, P22, N20, N22, M20, M22, L20, L22
O DAC TX port B – LVDS negative
RX and FB ADC INTERFACE
RXA[14:0]P
L3, L1, M2, M4, N2, N4, P3, P5, R2, R4, U1, T3, T5, U2, U4 I ADC receive port A – LVDS positive
RXA[14:0]N
L2, M1, N1, M3, P1, N3, P2, P4, R1, R3, T1, T2, T4, V1, U3 I ADC receive port A – LVDS negative
RXB[14:0]P
W1, W2, AA1, AA2, V4, AA3, Y4, AB4, W4, Y5, W6, AA6,
W7, AB7, AB8
I ADC receive port B – LVDS positive
RXB[14:0]N
V2, Y1, Y2, AB2, V3, AB3, Y3, AA4, W5, AA5, Y6, AB6, Y7,
AA7, AB9
I ADC receive port B – LVDS negative
RXC[7:0]P
AB17, Y16, AA17, Y18, AA18, AA20, AB20, AB21
I ADC receive port C – LVDS positive
RXC[7:0]N
AA16, W16, Y17, W17, AB18, AA19, AB19, AA21
I ADC receive port C – LVDS negative
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