GC6016 Datasheet, PDF (41/46 Pages) Texas Instruments – Wideband Transmit-Receive Digital Signal Processors

GC6016
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SLWS227A – NOVEMBER 2010 – REVISED MARCH 2011
MPU Interface Guidelines
The following section describes the hardware interface between the recommended microprocessor and the
GC6016. The GC6016 interface is an EMIF asynchronous interface.
The TMS320C674x/OMAP-L1x Processor Peripherals Overview referencde guide (SPRUFK9) illustrates the
connections to the TMS320C6748 peripherals. The TMS320C674x/OMAP-L1x Processor External Memory
Interface A (EMIFA) user's guide (SPRUFL6) illustrates the connections to the EMIF A interface, and DSP timing.
It is recommended that if more than one EMIF-A load is connected to the DSP, buffering is used for the control
bus WE, RD, address bus, and data bus.
Related Material and Documents
The following documents are available through your TI Field Application Engineer (FAE):
• GC5330/GC6016 EVM schematic diagram
• GC5330/GC6016 EVM layout diagram
• GC5330/GC6016 Baseband Application Note
• GC5330/GC6016 Baseband beAGC Application Note
• GC5330/GC6016 DDUC Application Note
• GC5330/GC6016 CFR Application Note
• GC5330/GC6016 TX (BUC, DAC Interface) Application Note
• GC5330/GC6016 RX Application Note
• GC5330 feAGC Application Note
• GC5330 Sync, MPU Application Note
• GC5330/GC6016 Software Application Guide
Copyright © 2010–2011, Texas Instruments Incorporated
Product Folder Link(s): GC6016
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