BQ24187 Datasheet, PDF (9/44 Pages) Texas Instruments – 1A USB-OTG Support

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Not Recommended for New Designs
bq24187
SLUSBM0 – APRIL 2014
7.6 Timing Requirements
Circuit of Figure 6, V_UVLO < V_IN < V_OVP and V_IN > V_BAT+V_SLP, T_J = –40°C–125°C and T_J=25ºC for typical values (unless
otherwise noted)
PARAMETER
CHARGER PARAMETERS
Deglitch time for battery short to
fast charge transition
t_DGL(TERM)
Deglitch time for charge
termination
t_DGL(RCH)
t_DETECT(SRC)
Deglitch time
Battery detection time (sourcing
current)
t_DETECT(SNK)
Battery detection time (sinking
current)
INPUT TERMINALS (CD, PSEL)
Deglitch for CD and PSEL
PROTECTION
t_DGL(VSLP)
t_DGL(BOVP)
Deglitch time for supply rising
above V_SLP+V_{SLP_EXIT}
BOVP Deglitch
Safety Timer Accuracy
BATTERY-PACK NTC MONITOR
t_DGL(TS)
Deglitch time on TS change
I²C COMPATIBLE INTERFACE
t_WATCHDOG
t_I2CRESET
TEST CONDITIONS
V_BAT rising or falling
Both rising and falling, 2-mV over-drive, t_RISE,
t_FALL=100ns
V_BAT falling below V_RCH, t_FALL=100ns
Termination enabled (TE = 1)
Termination enabled (TE = 1)
CD or PSEL rising/falling
Rising voltage, 2-mV over drive, t_RISE=100ns
Battery entering/exiting BOVP
Applies to V_HOT , V_WARM , V_COOL , and V_COLD
MIN
–20%
30
TYP
MAX UNIT
1
ms
32
ms
32
ms
2
s
250
ms
100
µs
30
ms
8
ms
20%
50
ms
50
s
700
ms
7.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
f_OSC
D_MAX
D_MIN
Oscillator frequency
Maximum duty cycle
Minimum duty cycle
MIN
TYP
MAX UNIT
1.35
1.5
1.65 MHz
95%
0%
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