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TM4C1299KCZAD Datasheet, PDF (832/2014 Pages) Texas Instruments – Tiva Microcontroller | |||
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External Peripheral Interface (EPI)
11.1
â Support for up to 512 Mb PSRAM in quad chip select mode, with dedicated configuration
register read and write enable.
â Support of both muxed and de-muxed address and data
â Access to a range of devices supporting the non-address FIFO x8 and x16 interface variant,
with support for external FIFO (XFIFO) EMPTY and FULL signals
â Speed controlled, with read and write data wait-state counters
â Support for read/write burst mode to Host Bus
â Multiple chip select modes including single, dual, and quad chip selects, with and without
ALE
â External iRDY signal provided for stall capability of reads and writes
â Manual chip-enable (or use extra address pins)
â General-Purpose mode
â Wide parallel interfaces for fast communications with CPLDs and FPGAs
â Data widths up to 32 bits
â Data rates up to 150 MB/second
â Optional "address" sizes from 4 bits to 20 bits
â Optional clock output, read/write strobes, framing (with counter-based size), and clock-enable
input
â General parallel GPIO
â 1 to 32 bits, FIFOed with speed control
â Useful for custom peripherals or for digital data acquisition and actuator controls
EPI Block Diagram
Figure 11-1 on page 833 provides a block diagram of a TM4C1299KCZAD EPI module.
832
June 18, 2014
Texas Instruments-Production Data
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