TM4C1299KCZAD Datasheet, PDF (32/2014 Pages) Texas Instruments – Tiva Microcontroller

Table of Contents
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ROM Third-Party Software (ROMSWMAP), offset 0xFCC ................................................. 661
Flash DMA Address Size (FLASHDMASZ), offset 0xFD0 ................................................. 663
Flash DMA Starting Address (FLASHDMAST), offset 0xFD4 ............................................ 664
EEPROM Size Information (EESIZE), offset 0x000 .......................................................... 665
EEPROM Current Block (EEBLOCK), offset 0x004 .......................................................... 666
EEPROM Current Offset (EEOFFSET), offset 0x008 ........................................................ 667
EEPROM Read-Write (EERDWR), offset 0x010 .............................................................. 668
EEPROM Read-Write with Increment (EERDWRINC), offset 0x014 .................................. 669
EEPROM Done Status (EEDONE), offset 0x018 .............................................................. 670
EEPROM Support Control and Status (EESUPP), offset 0x01C ........................................ 672
EEPROM Unlock (EEUNLOCK), offset 0x020 .................................................................. 673
EEPROM Protection (EEPROT), offset 0x030 ................................................................. 674
EEPROM Password (EEPASS0), offset 0x034 ................................................................. 676
EEPROM Password (EEPASS1), offset 0x038 ................................................................. 676
EEPROM Password (EEPASS2), offset 0x03C ................................................................ 676
EEPROM Interrupt (EEINT), offset 0x040 ........................................................................ 677
EEPROM Block Hide 0 (EEHIDE0), offset 0x050 ............................................................. 678
EEPROM Block Hide 1 (EEHIDE1), offset 0x054 ............................................................. 679
EEPROM Block Hide 2 (EEHIDE2), offset 0x058 ............................................................. 679
EEPROM Debug Mass Erase (EEDBGME), offset 0x080 ................................................. 680
EEPROM Peripheral Properties (EEPROMPP), offset 0xFC0 ........................................... 681
Reset Vector Pointer (RVP), offset 0x0D4 ........................................................................ 682
Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x200 .................................... 683
Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204 .................................... 683
Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208 .................................... 683
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 683
Flash Memory Protection Read Enable 4 (FMPRE4), offset 0x210 .................................... 683
Flash Memory Protection Read Enable 5 (FMPRE5), offset 0x214 .................................... 683
Flash Memory Protection Read Enable 6 (FMPRE6), offset 0x218 .................................... 683
Flash Memory Protection Read Enable 7 (FMPRE7), offset 0x21C ................................... 683
Flash Memory Protection Program Enable 0 (FMPPE0), offset 0x400 ............................... 685
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 685
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 685
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 685
Flash Memory Protection Program Enable 4 (FMPPE4), offset 0x410 ............................... 685
Flash Memory Protection Program Enable 5 (FMPPE5), offset 0x414 ............................... 685
Flash Memory Protection Program Enable 6 (FMPPE6), offset 0x418 ............................... 685
Flash Memory Protection Program Enable 7 (FMPPE7), offset 0x41C ............................... 685
Boot Configuration (BOOTCFG), offset 0x1D0 ................................................................. 687
User Register 0 (USER_REG0), offset 0x1E0 .................................................................. 690
User Register 1 (USER_REG1), offset 0x1E4 .................................................................. 690
User Register 2 (USER_REG2), offset 0x1E8 .................................................................. 690
User Register 3 (USER_REG3), offset 0x1EC ................................................................. 690
Micro Direct Memory Access (μDMA) ........................................................................................ 691
Register 1: DMA Channel Source Address End Pointer (DMASRCENDP), offset 0x000 ...................... 716
Register 2: DMA Channel Destination Address End Pointer (DMADSTENDP), offset 0x004 ................ 717
Register 3: DMA Channel Control Word (DMACHCTL), offset 0x008 .................................................. 718
Register 4: DMA Status (DMASTAT), offset 0x000 ............................................................................ 723
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June 18, 2014
Texas Instruments-Production Data