TM4C1299KCZAD Datasheet, PDF (1637/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1299KCZAD Microcontroller
Bit/Field
5
Name
JD
4
ANS
3
MIILB
2
DUPLEX
1
SPEED
0
LINK
June 18, 2014
Type
RO
RO
RO
RO
RO
RO
Reset
0
Description
Jabber Detect
This bit will not be cleared upon a read of the EPHYSTS register.
Value Description
0 No Jabber.
1 Jabber condition detected. This bit has meaning only in 10 Mb/s
mode. This bit is a duplicate of the Jabber Detect bit in the
EPHYBMSR register (PHY offset 0x001).
0
Auto-Negotiation Status
Value Description
0 Auto-Negotiation not complete.
1 Auto-Negotiation complete.
0
MII Loopback Status
Value Description
0 Normal operation.
1 Loopback active (enabled).
0
Duplex Status
Value Description
0 Half Duplex Mode
1 Full Duplex Mode
This bit indicates duplex status and is determined from Auto-Negotiation
or Forced Modes. Therefore, it is only valid if Auto-Negotiation is enabled
and complete and there is a valid link or if Auto-Negotiation is disabled
and there is a valid link.
1
Speed Status
Value Description
0 100 Mb/s mode.
1 10 Mb/s mode.
This bit indicates the status of the speed and is determined from
Auto-Negotiation or Forced Modes. It is only valid if Auto-Negotiation is
enabled and complete and there is a valid link or if Auto-Negotiation is
disabled and there is a valid link.
0
Link Status
Value Description
0 Link is not established.
1 Valid link is established (for either 10 or 100 Mb/s operation).
This bit is a duplicate of the Link Status bit in the EPHYBMSR
register (PHY offset 0x001).
This bit is not cleared upon a read of the EPHYSTS register.
Texas Instruments-Production Data
1637