TM4C1299KCZAD Datasheet, PDF (1607/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1299KCZAD Microcontroller
Register 70: Ethernet PHY Interrupt Mask (EPHYIM), offset 0xFD4
The Ethernet PHY Interrupt Mask (EPHYIM) register provides the raw interrupt status of the
integrated Ethernet PHY.
Ethernet PHY Interrupt Mask (EPHYIM)
Base 0x400E.C000
Offset 0xFD4
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
INT
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
INT
Type
RO
RW
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Ethernet PHY Interrupt Mask
Value Description
0 An Ethernet PHY interrupt is suppressed and not sent to the
interrupt controller.
1 An Ethernet PHY interrupt is sent to the interrupt controller when
the INT bit is set in the EPHYRIS register.
June 18, 2014
Texas Instruments-Production Data
1607