TM4C1299KCZAD Datasheet, PDF (1957/2014 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1299KCZAD Microcontroller
Table 28-34. Fast GPIO Module Characteristics (continued)
Parameter Parameter Name
Min
Fast GPIO fall time, 2-mA driveⁱ
Fast GPIO fall time, 4-mA driveⁱ
Fast GPIO fall time, 8-mA driveⁱ
T_{GPIOF Fast GPIO fall time, 8-mA drive with slew rate controli} -
Fast GPIO fall time, 10-mA driveⁱ
Fast GPIO fall time, 12-mA driveⁱ
Nom
10.3
5.15
2.58
3.54
2.07
1.73
Max
Unit
16.5
ns
8.29
ns
4.16
ns
5.55
ns
3.34
ns
2.78
ns
a. V_DD must be within the range specified in Table 28-6 on page 1927.
b. Leakage and Injection current characteristics specified in this table also apply to XOSC0 and XOSC1 inputs.
c. Note that for the ADC's external reference inputs, care must be taken to avoid a current limiting resistor (refer to I_VREF
spec in Table 28-44 on page 1968)
d. I/O pads should be protected if at any point the IO voltage has a possibility of going outside the limits shown in the table.
If the part is unpowered, the IO pad Voltage or Current must be limited (as shown in this table) to avoid powering the
part through the IO pad, causing potential irreversible damage.
e. Refer to individual peripheral sections for specific loading information.
f. This value includes all GPIO except for port pins PL6 and PL7.
g. The leakage current is measured with V_IN applied to the corresponding pin(s). The leakage of digital port pins is measured
individually. The port pin is configured as an input and the pull-up/pull-down resistor is disabled.
h. Time measured from 20% to 80% of V_DD.
i. Time measured from 80% to 20% of V_DD.
Table 28-35. Slow GPIO Module Characteristics^abc
Parameter Parameter Name
Min
Nom
Max
Unit
C_LGPIO
Capacitive loading for measurements given in this
table^d
-
-
50
pF
R_GPIOPU Slow GPIO internal pull-up resistor
13.8
20.0
31.4
kΩ
R_GPIOPD Slow GPIO internal pull-down resistor
13.0
20.5
35.5
kΩ
Slow GPIO input leakage current, 0 V ≤ V_IN ≤ V_DD
-
-
GPIO pins^e
3.25
nA
I_LKG+
Slow GPIO input leakage current, 0 V < V_IN ≤ V_DD,
-
-
GPIO pins configured as ADC or analog comparator
inputs
3.25
nA
I_INJ-
T_GPIOR
T_GPIOF
DC injection current, V_IN ≤ 0 V
Slow GPIO rise time, 2-mA drive^f
Slow GPIO fall time, 2-mA drive^g
-
-
3.42
µA
-
19.3
29.8
ns
-
12.8
21.1
ns
a. V_DD must be within the range specified in Table 28-6 on page 1927.
b. V_IN must be within the range specified in Table 28-1 on page 1925. Leakage current outside of this maximum voltage is not
guaranteed and can result in permanent damage of the device.
c. To avoid potential damage to the part, either the voltage or current on the non-Power, non-WAKE input/outputs should
be limited externally as shown in this table.
d. Refer to individual peripheral sections for specific loading information.
e. The leakage current is measured with V_IN applied to the corresponding pin(s). The leakage of digital port pins is measured
individually. The port pin is configured as an input and the pull-up/pull-down resistor is disabled.
f. Time measured from 20% to 80% of V_DD.
g. Time measured from 80% to 20% of V_DD.
June 18, 2014
Texas Instruments-Production Data
1957