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GC5325SEK Datasheet, PDF (8/24 Pages) Texas Instruments – GC5325 Wideband Digital Predistortion Transmit Processor
GC5325
SLWS215 – JANUARY 2009 .............................................................................................................................................................................................. www.ti.com
Table 1. TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
NO.
SYNCA
C9
SYNCB
B9
SYNCC
A9
SYNCD
AE21
SYNCDC
AF21
SYNCOUT
D9
DPDCLK
AC21
DPDCLKC
AD21
TESTMODE
AF4
JTAG INTERFACE
TCK
AF6
TDI
AE6
TDO
AF5
TRSTB
AE7
TMS
AF7
SIGNALS (See mode selection guide for pin assignment)
TX[37:0]
AC8, AD8, AE8, AF8, AC9, AD9, AE9, AF9, AC10,
AD10, AE10, AF10, AC11, AD11, AE11, AF11, AE12,
AF12, AE13, AF13, AF15, AE15, AD15, AC15, AF16,
AE16, AD16, AC16, AF17, AE17, AD17, AC17, AF18,
AE18, AD18, AC18, AF19, AE19
FB[35:0]
A11, B11, C11, D11, A12, B12, C12, D12, A14, B14,
A15, B15, C15, D15, A16, B16, C16, D16, A17, B17,
A18, B18, C18, D18, A19, B19, A20, B20, C20, D20,
A21, B21, C21, D21, A22, B22
Y26, W24, W25, W26, V24, V25, V26, U25, U26, T24,
NC
T25, T26, R24, R25, P25, P26, N25, N26, M24, M25,
M26, L24, L25, L26, K25, K26, J24, J25, H25, H26,
D22, C22
I/O
DESCRIPTION
I Programmable general-purpose sync
I Programmable general-purpose sync
I Programmable general-purpose sync
I Programmable general-purpose sync
I Complementary of SYNCD
O Programmable general-purpose sync output
I Clock to DPD
I Complementary clock to DPD
I Tie to ground
I JTAG clock
I JTAG data in
O JTAG data out
I JTAG reset (active-low); pull down if JTAG is not used.
I JTAG mode select
O Transmit to DAC(s)
I Feedback from ADC(s)
– No connect
VDD1
10 W
VDDA1 or VDDA2
VSS1
10 W
0.01 mF
1 mF
VSSA1 or VSSA2
S0315-01
Figure 1. GC5325 PLL Power Supply Filter
The two PLLs require an analog supply. These can be generated by filtering the core digital supply (Vdd). A
representative filter is shown in Figure 1. The two PLLs should have separate filters and be located as close as
reasonable to their respective pins (especially the bypass capacitors). The ferrite beads should be series 50R
(similar to Murata P/N: BLM31P500SPT Description: IND FB BLM31P500SPT 50R 1206). In particular, supply
VDDA1 must be less than or equal to VDD1 when VDD1 is at the low end of the required range. The series
resistor assures this condition is met.
8
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