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| GC5325SEK Datasheet, PDF (20/24 Pages) Texas Instruments – GC5325 Wideband Digital Predistortion Transmit Processor | |||
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GC5325
SLWS215 â JANUARY 2009 .............................................................................................................................................................................................. www.ti.com
CLK
CLKC
1/fCLK(ADCx)
ADC[# bits/2]P
ADC[# bits/2]N
tsu(ADCx[#/2]P)
Even Bits
Odd Bits
t=N
th(ADCx[#/2]P)
t=N+1
Even Bits
Odd Bits
Figure 12. LVDS Timing Specifications (8 Ã 2 DDR LVDS)
T0293-01
APPENDIX A
See the TMS320C672x DSP Universal Host Port Interface (UHPI) reference guide (SPRU719).
ADDR/DATA BUS (16-Bit)
DATA READY
HALFWORD STROBE
Host
Processor
CHIP SELECT
BYTE ENABLE (1)
CONTROL INPUT (2)
FUNDAMENTAL STROBE
READ/WRITE CONTROL
DSP INTERRUPT
HOST INTERRUPT
UHPI_HD[15:0]
UHPI_HRDYB
UHPI_HD[16]/HHWIL
UHPI_HCS
UHPI_HBE[1:0]B
UHPI_HCNTL[1:0]
C6727 DSP
Asynchronous
Mode
UHPI_HCSB/UHPI_HDS[2:1]B
UHPI_HRWB
AMUTE2/HINTB
AFSR2
(1) Byte enables are aplicable to single HPID accesses. All byte enables must be active during HPID with post-increment
(burst) UHPI accesses.
(2) Control inputs selecting between HPIA, HPIC, HPID, and HPID with post-increment accesses.
Figure 13. Host-to-DSP Interface (Multiplexed Host Address/Data Dual Halfword)
B0281-01
3G
3GPP
3GPP2
ACLR
ACPR
ADC
BW
GLOSSARY OF TERMS
Third generation (refers to next-generation wideband cellular systems that use CDMA)
Third generation partnership project (W-CDMA specification, www.3gpp.org)
Third generation partnership project 2 (cdma2000 specification, www.3gpp2.org)
Adjacent channel leakage ratio (measure of out-of-band energy from one CDMA carrier)
Adjacent channel power ratio
Analog-to-digital converter
Bandwidth
20
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